Intel S1200BTS

Table of Contents Intel® Server Board S1200BT TPS
Revision 1.0
Intel order number G13326-003
iv
Table of Contents
1. Introduction ........................................................................................................................ 1
1.1 Chapter Outline ...................................................................................................... 1
1.2 Server Board Use Disclaimer ................................................................................. 1
2. Overview ............................................................................................................................. 2
2.1 Intel
®
Server Board S1200BT Feature Set ............................................................. 2
2.2 Server Board Layout .............................................................................................. 4
2.2.1 Server Board Connector and Component Layout ................................................... 5
2.2.2 Intel
®
Server Board S1200BTL Mechanical Drawings ............................................ 8
2.2.3 Server Board Rear I/O Layout .............................................................................. 14
3. Functional Architecture ................................................................................................... 15
3.1 Processor Sub-System......................................................................................... 16
3.1.1 Intel
®
Xeon
®
Processor E3-1200 Series ............................................................... 16
3.1.2 Intel
®
Core™ Processor i3-2100 Series ............................................................... 17
3.1.3 Intel
®
Turbo Boost Technology ............................................................................. 17
3.2 Memory Subsystem.............................................................................................. 17
3.2.1 Memory Supported ............................................................................................... 18
3.2.2 Post Error Codes.................................................................................................. 18
3.2.3 Memory Map and Population Rules ...................................................................... 19
3.2.4 Publishing System Memory .................................................................................. 21
3.2.5 Memory RAS Support .......................................................................................... 21
3.3 Intel
®
Chipset PCH ............................................................................................... 21
3.4 I/O Sub-system .................................................................................................... 22
3.4.1 Digital Media Interface (DMI) ................................................................................ 22
3.4.2 PCI Express Interface .......................................................................................... 22
3.4.3 Serial ATA Support .............................................................................................. 22
3.4.4 Low Pin Count (LPC) Interface ............................................................................. 23
3.4.5 USB 2.0 Support .................................................................................................. 23
3.5 Optional Intel
®
SAS RAID Module ........................................................................ 24
3.6 Integrated Baseboard Management Controller ..................................................... 24
3.6.1 Integrated BMC Embedded LAN Channel ............................................................ 26
3.6.2 Optional RMM4 Advanced Management Board .................................................... 27
3.6.3 Serial Ports .......................................................................................................... 27