Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture
Revision 1.3
31
• One Intel
®
82541PI Fast Ethernet Controller
• Two slots capable of supporting full length PCI add-in cards operating at 33 MHz
3.4.1.1.1 Device IDs (IDSEL)
Each device under the PCI hub bridge has its IDSEL signal connected to one bit of AD (31:16),
which acts as a chip select on the PCI bus segment in configuration cycles. This determines a
unique PCI device ID value for use in configuration cycles. The following table shows the bit to
which each IDSEL signal is attached for segment A devices and the corresponding device
description.
Table 13. Segment A Configuration IDs
IDSEL Value Device
21 Intel® 82541PI LAN (NIC2)
17 PCI Slot 1(32b/33MHz)
16 PCI slot 2(32b/33MHz)
3.4.1.1.2 Segment A Arbitration
PCI segment A supports two PCI devices: the Intel
®
ICH9R and one PCI bus master (NIC). All
PCI masters must arbitrate for PCI access, using resources supplied by the Intel
®
ICH9R. The
host bridge PCI interface (ICH9R) arbitration lines REQx* and GNTx* are a special case in that
they are internal to the host bridge. The following table defines the arbitration connections.
Table 14. Segment A Arbitration Connections
Baseboard Signals Device
PCI REQ_N5/GNT_N5 Intel
®
82541PI LAN (NIC2)
PCI REQ_N1/GNT_N1 PCI Slot 1 (32bit/33MHz)
PCI REQ_N0/GNT_N0 PCI Slot 2 (32bit/33MHz)