Error Reporting and Handling IntelĀ® Server Boards S3200SH/S3210SH TPS
Revision 1.3
84
Table 46. POST Error Messages and Handling
Error Code Error Message Response Log Error
CMOS date / time not set Pause Y
Configuration cleared by jumper Pause Y
Configuration default loaded Pause N
Password check failed Halt N
PCI resource conflict Pause N
Insufficient memory to shadow PCI ROM Pause N
Processor thermal trip error on last boot Pause Y
5.2.4 POST Error Beep Codes
The following table lists POST error beep codes. Prior to system video initialization, BIOS uses
these beep codes to inform users on error conditions. The beep code is followed by a user
visible code on the POST progress LEDs.
Table 47. POST Error Beep Codes
Beeps Error Message POST Progress Code Description
3 Memory error System halted because a fatal error related to the memory
was detected.
5.2.5 POST Error Pause Option
In case of POST error(s) that are listed as "Pause", the BIOS will enter the error manager and
wait for user to press an appropriate key before booting the operating system or entering BIOS
Setup.
The user can override this option by setting "POST Error Pause" to "disabled" in BIOS setup
Main menu page. If "POST Error Pause" option is set to "disabled", the system will boot the
operating system without user-intervention. The default value is set to "enabled".
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