Chapter 3 — Theory of Operation
52 CV30 Fixed Mount Computer Service Manual
All the above power VCC_CORE, VCC_PLL, VCC_SRAM, V2P5, V1P8
is bucked from the MAIN_PWR through a power management IC
MAX1587. This IC is design to be optimized for the X-Scale Processor. It
has 3 step-down DC-DC Output and 3 linear regulators (LDO). The DC-
DC converters output the V2P5, V1P8 and the VCC_CORE. As for
LDO, they output the VCC_PLL and VCC_SRAM. The VCC_PLL has a
fix voltage of 1.3 V and the VCC_SRAM has a voltage of 1.1 V. Both of
these voltages supply the CPU PXA270 SRAM and PLL power rail.
The V2P5 supply is feedback to the IN45 of the IC, which is the power
input to the LDOs. The VCC_CORE voltage is set by the I
2
C Serial
Interface to the range between 0.75 V to 1.6 V with the default value of
1.35 V. This VCC_CORE power will feed through a ferrite bead prior to
sourcing the CPU CORE power rail. The V1P8 power feeds2 directly to
the SDRAM, the I/O Supply of DiskOnChip and through a MOSFET
switch to output power V1P8_CPU to the CPU VCC_BB power and
channel through ferrite bead prior to CPU MEM power rail. This
V1P8_CPU also supplies power to the graphic controller through a ferrite
bead (V1P8_GF_HOST). The MOSFET switch is controlled by signal
nSYS_EN.
V1P5_LCD
MAIN_PWR To V1P5_LCD
The MAIN_PWR was channeled through a ferrite bead prior to being
bucked to V1P5_LCD through the LTC3406 converter. The shutdown pin
of the converter is controlled by the LCD_CORE_PWR_EN signal
asserted by the CPU.
V3P3_MAIN
MAIN_PWR To V3P3_MAIN
This 3.3 V power source, which is an always ON power plane, is the main
power supply to many of the main components, such as the CPU, PIC,
Auxiliary circuits, and so on. The LTC3443 converter bucks the
MAIN_PWR to V3P3_MAIN. This supply feeds directly to the supply
voltage of the DiskOnChip.
V3P3_PIC
V3P3_MAIN To V3P3_PIC
The V3P3_PIC supplies power to the PIC controller. PIC18LF4320 is a
ferrite filtered version of V3P3_MAIN.
V3P3_CODEC_ANLG, V3P3_CODEC_DIG, V3P3_ANT_ANLG
V3P3_MAIN To V3P3_CODEC_ANLG, V3P3_CODEC_DIG,
V3P3_ANT_ANLG
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