Chapter 3 — Theory of Operation
CV30 Fixed Mount Computer Service Manual 53
The V3P3_CODEC_DIG is a PFET controlled version of V3P3_MAIN
by signal AUDIO_CODEC_PWR_EN. This power feeds through a ferrite
bead to V3P3_CODEC_ANLG. Both these two power supplies provide
power to the Audio CODEC IC WM9713L on digital and analog power
respectively. The V3P3_ANT_ANLG is a PFET controlled version of
V3P3_CODEC_ANLG, controlled by the signal nPWR_EN.
V3P3_CPU
V3P3_MAIN To V3P3_CPU
The V3P3_CPU is a PFET controlled version of the V3P3_MAIN. This
power is controlled by signal nSYS_EN, to the gate of the 2 PFET in
parallel. Upon the assertion of the nSYS_EN signal the first PFET is ON
immediately but the current is constant with the presence of the series
resistor. The second PFET comes ON later due to the RC at the gate. The
connection reduces the inrush current on power up. This power source
supplies power directly to the CPU power rail VCC_IO, VCC_USB,
VCC_LCD, VCC_USIM and ferrite filtered power to the FVDD, VVDD
and SDVDD power rail of the graphic controller. It is also the power source
to the PFET controlled version of the SD Card, Transceivers, and
Peripherals such as Bluetooth, 802.11 radio, and Ethernet.
V3P3_SD
V3P3_CPU To V3P3_SD
The V3P3_SD is a PFET controlled version of the V3P3_CPU. This
power controls signal nSD_PWR_EN.
V3P3_AUX
V3P3_CPU To V3P3_AUX
This power is the PFET controlled version of the V3P3_CPU by the signal
nSYS_EN. This power goes through individual PFET controlled switches
to supply power for Ethernet, CF (Radio), Bluetooth, and the transceivers.
V3P3_ETH, V3P3_ETH_ANLG
V3P3_AUX To V3P3_ETH, V3P3_ETH_ANLG
Both the V3P3_ETH and the V3P3_ETH_ANLG are the individual
ferrite filtered, PFET controlled version of the V3P3_AUX by the signal
nETH_PWR_EN_PF. This signal is asserted with the condition of both
the ETH_PWR_EN and nBATT_FAULT_DET at Logic H. The CPU
asserts the ETH_PWR_EN, unless the nBATT_FAULT_DET reveals the
presence of the external power supply to the unit.
V3P3_CF
V3P3_AUX To V3P3_CF
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