JDS Uniphase HA9 Series User Manual

Programming Guide – 40
Status Register
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
self-test
error
service
request
syntax
error
message
available
0 settled 0 parameter
error
• Bit 7 (self-test error) is set if a calibration error was detected after power-up or after the
self-test query (TST?) was executed. At all other times it is 0.
• Bit 6 (service request) is set when the interrupt request logic of the attenuator detects a
reason to generate an SRQ on the GPIB.
• Bit 5 (syntax error) is set when the parser detects a syntax error in a command mnemonic.
• Bit 4 (message available) is set when a message is available in the output buffer.
• Bit 2 (settled) is set when bit 2 in the condition register changes from 0 to 1.
• Bit 0 (parameter error) is set when a parameter value is out of the range of the attenuator.
The status register can be read with the status register query (STB?) or by serial polling the
GPIB interface. During power-up, the status register contains 0 and can be read only by serial
polling. After initial power-up, only bit 2 is set to 1. The clear status byte command (CSB) and
the clear device command (CLR) clear the status register.
STB? can be used to clear the status register only if bit 6 is on.
SRQ Mask Register
The SRQ mask register unmasks specific events in the status register that generate a service
request interrupt on the GPIB interface. The SRQ mask command (SRE) writes to the SRQ
mask register. When a bit in the SRQ mask register is set to 1, the interrupt logic of the
attenuator monitors the corresponding event bit in the status register. When the bit changes
from 0 to 1, a service request interrupt is generated and bit 6 in the status register is set.
The SRQ mask register can unmask more than one event at a time. The first unmasked event
to change from 0 to 1 causes an interrupt. To acknowledge this interrupt, the GPIB interface
can be serial polled or the status register can be read with STB?. The first time the attenuator
is serial polled after an SRQ is generated, bit 6 is on. Subsequent serial polling returns a value
with bit 6 off. Similarly, STB? returns the status register with the SRQ set, but then the
attenuator logic automatically clears the register. As a result, subsequent STB? queries return
0.
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JDS Uniphase HA9 Series Specifications

General

Brand	JDS Uniphase
Model	HA9 Series
Category	Control Unit
Language	English