JVC MX-J170V - Stereo Filter DAC

MX-J170V
1-43
UDA1330AT (AI1) : Stereo filter DAC
MGL401
DAC
UDA1330ATS
NOISE SHAPER
INTERPOLATION FILTER
VOLUME/MUTE/DE-EMPHASIS
CONTROL
INTERFACE
14
15
DAC
6
DIGITAL INTERFACE
8
16
9
10
3
2
1
4
5
11
7
13 12
VOUTR
BCK
V
SSA
WS
VOUTL
DATAI
V
DDA
V
DDD
V
ref(DAC)
V
SSD
APPL0
SYSCLK
APPL1
APPSEL
APPL2
APPL3
3. Block diagram.
1. Pin layout
2. Pin function
SYMBOL PIN DESCRIPTION
BCK 1 bit clock input
WS 2 word select input
DATAI 3 data input
V
DDD
4 digital supply voltage
V
SSD
5 digital ground
SYSCLK 6 system clock input: 256f
s
, 384f
s
and 512f
s
APPSEL 7 application mode select input
APPL3 8 application input 3
APPL2 9 application input 2
APPL1 10 application input 1
APPL0 11 application input 0
V
ref(DAC)
12 DAC reference voltage
V
DDA
13 analog supply voltage for DAC
VOUTL 14 left channel output
V
SSA
15 analog ground
VOUTR 16 right channel output
UDA1330ATS
MGL402
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VOUTRBCK
V
SSA
WS
VOUTL
DATAI
V
DDA
V
DDD
V
ref(DAC)
V
SSD
APPL0SYSCLK
APPL1APPSEL
APPL2APPL3