JVC MX-J170V

MX-J170V
1-37
1. Block diagram
DECODER
MICRO-
CONTROLLER
INTERFACE
VERSATILE PINS
INTERFACE
SUBCODE
PROCESSOR
KILL
PEAK
DETECT
SERIAL DATA
INTERFACE
TIMING
TEST
ADC
V
ref
GENERATOR
FRONT-END
DIGITAL
PLL
MOTOR
CONTROL
AUDIO
PROCESSOR
EBU
INTERFACE
ERROR
CORRECTOR
MICROCONTROLLER
INTERFACE
PRE-
PROCESSING
CONTROL
FUNCTION
CONTROL
PART
EFM
DEMODULATOR
SRAM
RAM
ADDRESSER
OUTPUT
STAGES
FLAGS
12
13
7
40
39
41
42
2
1
3
6
25
31
44
24
16
15
26
49
48
47
46
45
43
38
63 34 61 62 32
8 9 10 11 4 14 5 17 33 50 58 52 57
54
55
56
64
59
60
53
51
30
29
28
27
V
RIN
I
ref
R2
SCL
SDA
RAB
SILD
HFIN
HFREF
ISLICE
TEST1
TEST2
TEST3
SELPLL
CRIN
CROUT
CL16
CL11/4
SBSY
SFSY
SUB
RCK
STATUS
R1
D1 D2 D3 D4
V
SSA1
V
DDA2
V
SSD2
V
DDD2(C)
V
SSA2
V
DDA1
V
SSD1
V
SSD3
V
DDD1(P)
V1 V2/V3 V4 V5 KILL
EF
DATA
WCLK
SCLK
SERIAL DATA
(LOOPBACK)
INTERFACE
37
35
36
SDI
WCLI
SCLI
BITSTREAM
DAC
20
21
18
19
LP
22
RN
23
RP
LN
V
pos
V
neg
DOBM
MOTO2
MOTO1
LDON
SL
FO
RA
CFLG
RESET
SAA7327
MGS234
SAA7327 (IC327) :Digital servo processor