STATus:QUEStionable:CONDition?
Queries the condition register for the Questionable Status group. This is a read-only register, which
holds the instrument's live (unlatched) operational status. Reading the Questionable Status
Condition register does not clear it.
Parameter Typical Return
(none) <bit value>
Read questionable status condition register: STAT:QUES:COND?
The value returned is the binary-weighted sum of all bits set in the register.For example, to enable bit
2 (value 4) and bit 4 (value 16), the corresponding decimal value would be 20 (4 + 16).
The condition register bits reflect the current condition. If a condition goes away, the corresponding bit
is cleared.
A *RST clears this register, other than those bits where the condition still exists after *RST.
STATus:QUEStionable:ENABle <value>
STATus:QUEStionable:ENABle?
Sets the value of the enable register for the Questionable Status group. The enable register is a mask
for enabling specific bits from the Questionable Event register to set the QUES (questionable
summary) bit of the Status Byte register. The STATus:PRESet command clears all enable register bits.
Parameter Typical Return
Decimal sum of the bits in the register, default 0. For example, to enable bit 2 (value 4), bit 3 (value 8),
and bit 7 (value 128), use decimal sum 140 (4 + 8 + 128). Default 0.
<bit value>
Enable bits 2 and 4 in the questionable enable register: STAT:QUES1:ENAB 24
For example, to enable bit 2 (value 4) and bit 4 (value 16), the corresponding decimal value would be
20 (4 + 16).
A *CLS does not clear the enable register, but does clear the event register.
Keysight AC6800B Series Operating and Service Guide 149
3îîSCPI Programming Reference
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