Note that the minimum measurable high/low time is limited by the edge rate limit discussed in
Section 2.9.2.
When using the LabJackUD driver the value returned is the entire 32-bit value. To determine
the high and low time this value should be split into a high and low word. One way to do this is
to do a modulus divide by 2
16
to determine the LSW, and a normal divide by 2
16
(keep the
quotient and discard the remainder) to determine the MSW.
Writing a value of zero to the timer performs a reset. After reset, a read of the timer value will
return zero until a new edge is detected. If a timer is reset and read in the same function call,
the read returns the value just before the reset. The duty cycle reset is special, in that if the
signal is low at the time of reset, the high-time/low-time registers are set to 0/65535, but if the
signal is high at the time of reset, the high-time/low-time registers are set to 65535/0. Thus if no
edges occur before the next read, it is possible to tell if the duty cycle is 0% or 100%.
2.9.1.5 Firmware Counter Input (Mode 5)
On every rising edge seen by the external pin, this mode increments a 32-bit register. Unlike
the pure hardware counters, these timer counters require that the firmware jump to an interrupt
service routine on each edge.
Writing a value of zero to the timer performs a reset. After reset, a read of the timer value will
return zero until a new edge is detected. If a timer is reset and read in the same function call,
the read returns the value just before the reset.
2.9.1.6 Firmware Counter Input With Debounce (Mode 6)
Intended for frequencies less than 10 Hz, this mode adds a debounce feature to the firmware
counter, which is particularly useful for signals from mechanical switches. On every applicable
edge seen by the external pin, this mode increments a 32-bit register. Unlike the pure hardware
counters, these timer counters require that the firmware jump to an interrupt service routine on
each edge.
When configuring only (UpdateConfig=1), the low byte of the timer value is a number from 0-
255 that specifies the debounce period in ~30 ms intervals. In the high byte of the timer value,
bit 0 determines whether negative edges (bit 0 clear) or positive edges (bit 0 set) are counted.
Assume this mode is enabled with a value of 1, meaning that the debounce period is 30 ms and
negative edges will be counted. When the input detects a negative edge, it increments the
count by 1, and then waits 30 ms before re-arming the edge detector. Any negative edges
within the 30 ms debounce period are ignored. This is good behavior for a normally-high signal
where the switch closure causes a brief low signal (Figure 2-9). The debounce period can be
set long enough so that bouncing on both the switch closure and switch open is ignored.
When only updating and not configuring, writing a value of zero to the timer performs a reset.
After reset, a read of the timer value will return zero until a new edge is detected. If a timer is
reset and read in the same function call, the read returns the value just before the reset.
2.9.1.7 Frequency Output (Mode 7)
Outputs a square wave at a frequency determined by TimerClockBase/TimerClockDivisor
divided by 2*Timer#Value. The Value passed should be between 0-255, where 0 is a divisor of
256. By changing the clock configuration and timer value, a wide range of frequencies can be
output, as shown in the following table:
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