Marantz AV7701 - Page 184

184
Sil9575 (HDMI : IC501)
Sil9575 Block diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
99
98
97
96
95
94
93
92
91
90
89
45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76
D15
D16
D17
D18
D19
DE
VSYNC
HSYNC
IDCK
R0XC-
R0XC+
R0X0-
R0X0+
R0X1-
R0X1+
R0X2-
R0X2+
R1XC-
R1XC+
R1X0-
R1X0+
R1X1-
R1X1+
R1X2-
R1X2+
R2XC-
R2XC+
R2X0-
R2X0+
R2X1-
DSCL3
CBUS_HPD3
R3PWR5V
DSCL4
DSCL5
SBVCC5
VCC33OUT
TX_HPD0
TXDSDA0
TXDSCL0
TXDSDA1
TXDSCL1
RSVDL
SS/GPIO2
SCLK/GPIO3
SD0/GPIO4
SDI/GPIO5
XTALIN
XTALOUT
XTALVCC33
XTALGND
APLL13
Top View
Si
I
957n
33
34
35
36
37
38
39
40
41
42
43
44
R2X1+
R2X2-
R2X2+
R4X0-
R4X0+
AVDD33
R3XC-
R3XC+
R3X0-
R3X0+
R4XC-
R4XC+
77 78 79 80 81 82 83 84 85 86 87 88
96
132
131
130
129
128
127
126
125
124
123
122
121
AVDD33
T1X2+ T1X2-
T1X1+ T1X1- T1X0+ T1X0-
T1XC+ T1XC-
TPVDD13
CVCC13
TDVDD13
144 143 142 141 140 139 138 137 136 135 134 133
100
CBUS_HPD4
R4PWR5V
CBUS_HPD5
TX_HPD1
SD0_0/DL0
SD0_1/DR1/GPIO6
SD0_3/DR2/GPIO8
SD0_2/DL1/GPIO7
WS0_OUT/DR0
TOX2+ TOX2- TOX1+ TOX1- TOX0+ TOX0- TOXC+ TOXC-
ARC0 ARC1
MCLK
SCK0/DDCK
SPDIF0_OUT/DL2
WS0_IN/GPIO11
SD0_IN/SPDIFO_IN
SCK1_IN/SCK1_OUT WS1_IN/WS1_OUT
SD1_IN/SD1_OUT/SPDIF1_IN/SPDIF1_OUT
MUTEOUT/GPIO9
D14
D13 D12 D11 D10 D9 D1 D2 D3 D4 D5 D6 D7 D0 D8
R3X2-
R3X2+
R3X1-
R3X1+
DSDA0 DSDA1 DSDA2 DSDA3
DSDA4
DSDA5
DSDA6(VGA)
DSCL2 DSCL0 DSCL1
DSCL6(VG
A)
R2PWR5V
R5PWR5V
R1PWR5V R0PWR5V
CBUS_HPD0 CBUS_HPD1 CBUS_HPD2
CSCL
CSDA
RESET#
TPWR_CI2CA
INT
CEC_A0/WAKEUP
CEC_A1
RSVDL
MHL_CD0/GPIO0
MHL_CD1/GPIO1
TDVDD13 TPVDD13
CVCC13
CVCC13 CVCC12
CVCC13
R4X1-
R4X1+
R4X2-
R4X2+
R5X0-
R5X0+
R5XC+
R5X1-
R5X1+
R5X2-
R5X2+
R5XC-
AVDD33
IOVCC33
IOVCC33
AVDD13
AVDD13
AVDD13
SCK0_IN/GPIO10
Power-Down
Section
R0X
R1X
R2X
R3X
R4X
R5X
D[19..0]
Audio Input
Audio Output
Multi-Channel
Parallel
Video
Input
ARC0/1 Rx
I2S/SPDIF/
DSD
I2S/SPDIF
ARC
Input
and
Output
HDCP
Decryption
T1X
Audio Input
I2S/SPDIF
OSD
SPI
T0X
TMDS Tx
(Port 0)
HDCP Encryption
Main
Sub
Main
Sub
Mobile HD
Control
HDCP
Registers
OTP
EDID SRAM
NVRAM
Booting
Sequencer
Configuration, Status,
and Interrupt-Control
Registers
DDC0
DDC1
DDC2
DDC3
DDC4
DDC5
Local
I
2
C
Always-On
Section
CEC A0
DDC
I2C
INT
CBUS/
HPD
Serial Ports
CEC A1
CBUS0
CBUS1
CEC Interface
Controller 1
TPI HW
DDC TX
ARC0/1 Tx
Power
RnPWR5V,
SBVCC5V
HDMI/
MHL
Receiver
InstaPort
HDMI/
MHL
Receiver
InstaPort
TMDS Rx
(Port 0)
TMDS Rx
(Port 1)
TMDS Rx
(Port 2)
TMDS Rx
(Port 3)
TMDS Rx
(Port 4)
TMDS Rx
(Port 5)
M
U
X
M
U
X
M
U
X
M
U
X
M
U
X
M
U
X
TMDS Tx
(Port 1)
HDCP Encryption
Audio Output
2 Channel
CEC Interface
Controller 0
SRC
M
U
X
DDC6
Video
Pattern
Generator
InstaPrevue
Stream
Mixer
Video/
Audio
Splitter
A
B
C
D
E
F
G
ENB