Connectors on Matrox Solios eV-CLBL and Matrox Solios eV-CLFL boards 105
Pin Hardware signal name MIL constant
for auxiliary
signal
*
Digitizer
device number
for auxiliar y
signal
Description
1 P1_TTL_AUX_IO_1 M_AUX_IO9 M_DEV1 TTL auxiliary input/output 1 for acq. path 1.
2 GND Ground.
4+,5- P1_LVDS_AUX_OUT1 M_AUX_IO13 M_DEV1 LVDS auxiliary signal (output) for acquisition path 1, which
supports: timer output (M_TIMER2 on M_DEV1) or user output
(M_USER_BIT1).
6+,3- LVDS_AUX_IN0 M_AUX_IO4 M_DEV0/
M_DEV1
LVDS auxiliary signal (input), shared between both acquisition
paths for trigger input (trigger controller 2 on acq path 0; 2 or 0
on acq path 1) or user inpu t, and dedicated to acqu isition path 1
for field polarity input, or quadrature input bit 0.
9+,8- P1_LVDS_AUX_OUT0 M_AUX_IO12 M_DEV1 LVDS auxiliary signal (output) for acquisition path 1, which
supports: timer output (M_TIMER1 on M_DEV1) or user output
(M_USER_BIT0).
11+,7- P0_LVDS_AUX_OUT1 M_AUX_IO13 M_DEV0 LVDS auxiliary signal (output) for acquisition path 0, which
supports: timer output (M_TIMER2 on M_DEV0) or user output
(M_USER_BIT1).
12 GND Ground.
14+,10- P0_LVDS_AUX_OUT0 M_AUX_IO12 M_DEV0 LVDS auxiliary signal (output) for acquisition path 0, which
supports: timer output (M_TIMER1 on M_DEV0) or user output
(M_USER_BIT0).
15 P1_TTL_AUX_IO_0 M_AUX_IO8 M_DEV1 TTL auxiliary signal (input/output) for acquisition path 1, which
supports: timer output (M_TIMER3 on M_DEV1), trigger input
(trigger controller 0 on acq path 1), user input, user o utput
(M_USER_BIT2), or field polarity input.
16+,13- P1_LVDS_HSYNC_OUT HSYNC output for acq. path 1.
18+,17- P1_LVDS_VSYNC_OUT VSYNC output for acq. path 1.
19+,20- P1_LVDS_CLK_OUT Clock output for acq. path 1.
21+,23- P0_LVDS_AUX_IN1 M_AUX_IO11 M_DEV0 LVDS auxiliary signal (input) for acquisition path 0, which
supports: trigger input (trigger controller 1 on acq path 0), user
input, timer clock input, or quadrature input bit 1.
24+,27- OPTO_AUX_IN1 M_AUX_IO1 M_DEV0/
M_DEV1
Opto-isolated auxiliary signal (input), shared between both
acquisition paths for trigg er in put (tri gger controlle r 3 on acq path
0; 3 or 1 on acq path 1) or user input.
25 NC Not connected.
26+,22- OPTO_AUX_IN0 M_AUX_IO0 M_DEV0 Opto-isolated auxiliary signal (input), shared between both
acquisition paths for trigg er in put (tri gger controlle r 2 on acq path
0; 2 or 0 on acq path 1) or user input, and dedicated to
acquisition path 1 for field polarity input.