Matrox Solios eV-CL - Page 76

76 Appendix B: Technical information
• Can crop (ROI capture) acquired data or subsample it by integer subsampling
factors of 1 to 16.
• Has 128/256/512 Mbytes of 32-bit 216 MHz DDR2 SDRAM used as
acquisition memory. 1728 Mbytes/sec of memory bandwidth.
• Has one LVDS serial port (UART) per acquisition path.
• Supports an external 5 V tolerant rotary encoder with quadrature output per
acquisition path.
• Has four camera control signals (re-routing of specific auxiliary input signals
*
, or
HSYNC output, VSYNC output, clock output, timer output, or user output) per
acquisition path
*
.
• Three TTL auxiliary I/O signals (trigger input, field polarity input, user input,
user output, or timer output) per acquisition path
*
.
• Two LVDS auxiliary input signals (trigger input, field polarity input, timer-clock
input, quadrature input, or user input) per acquisition path
*
.
• Two opto-isolated auxiliary input signals (trigger input, field polarity input, or
user input) per acquisition path
*
.
*. See the Camera control and auxiliary signals section of Chapter 4: Matrox Solios eV-CL
hardware reference for supported configurations.