78 Appendix B: Technical information
Features specific to Matrox Solios eV-CLB and Matrox Solios eV-CLF
• One additional LVDS auxiliary output signal (timer output or user output) per
acquisition path
*
.
Features specific to Matrox Solios eV-CLBL and Matrox Solios eV-CLFL
• Separate LVDS pixel clock output, HSYNC output, and VSYNC output signals
per acquisition path.
• Two additional LVDS auxiliary output signals (timer output or user output) per
acquisition path
*
.
*. See the Matrox Solios eV-CL hardware reference chapter for supported configurations.