General Description ............................................................................ 1
Applications .................................................................................. 1
Benefits and Features .......................................................................... 1
Block Diagram ................................................................................ 2
Absolute Maximum Ratings ...................................................................... 6
Package Information ........................................................................... 6
28 TQFN-EP ................................................................................6
Electrical Characteristics ........................................................................ 6
Typical Operating Characteristics ................................................................ 10
Pin Configuration ............................................................................. 14
Pin Description ............................................................................... 14
Functional Diagrams .......................................................................... 16
Detailed Description........................................................................... 17
Default Register Setting ......................................................................17
Low-Noise Amplifier (LNA) ....................................................................17
Mixer .....................................................................................17
Synthesizer ................................................................................18
IF Filter ...................................................................................18
Programmable Gain Amplifier (PGA) ............................................................19
Automatic Gain Control (AGC) .................................................................19
ADC......................................................................................20
ADC Fractional Clock Divider ..................................................................22
ADC Clock Alignment ........................................................................22
DSP Interface ..............................................................................22
Reference Clock ............................................................................24
Serial Interface .............................................................................25
Register Map ................................................................................ 28
Register Details.............................................................................31
Configuration 1 (0x0) ......................................................................31
Configuration 2 (0x1) ......................................................................33
Configuration 3 (0x2) ......................................................................35
PLL Configuration (0x3)....................................................................37
PLL Integer Division Ratio (0x4) .............................................................39
PLL Fractional Division Ratio (0x5) ...........................................................40
TABLE OF CONTENTS
www.maximintegrated.com
Maxim Integrated
│
3
MAX2771 Multiband Universal GNSS Receiver
To Next Page
Loading...