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General| Brand | Mitsubishi |
|---|---|
| Model | Q2ACPU |
| Category | Controller |
| Language | English |
Details design precautions for safe PLC operation, covering power failure, emergency stops, and output behavior.
Details precautions for safe installation of PLC components.
Covers essential wiring practices for safety and preventing malfunctions.
Outlines precautions for safe startup and maintenance of the PLC system.
Describes the key features and capabilities of the QnACPU.
Details new functions and instructions added for special function modules.
Shows equipment and peripheral device configurations for QnACPU systems.
Lists the system equipment (modules and peripheral devices) usable in a QnACPU system.
Explains I/O numbering used in sequence programs for input/output modules.
Details the concept of I/O number assignment performed when the PLC is powered ON or reset.
Explains the validity and methods of I/O assignment with GPP function.
Describes reading/writing data to special function module buffer memory using FROM/TO instructions.
Explains handling buffer memory of special function modules as QnACPU devices.
Explains auto refresh by setting link information for MELSECNET/MINI-S3 master modules.
Describes automatic communications between QnACPU and CC-Link modules via buffer memory.
Reads CPU programs and device statuses to a peripheral device capable of GPP functions.
Allows changing a program while the CPU module is in the RUN state.
Displays the processing time of the program being executed.
Monitors watchdog errors due to CPU module hardware or program errors.
Diagnoses the QnACPU's own errors and indicates them.
Records detected results by self-diagnostics with detection time in memory.
Performs a program at fixed intervals regardless of the actual program scan time.
Retains device data when the CPU module is reset or power fails.
Controls the operating status of the CPU module from external sources.
Appends a comment to a CPU module for easier identification.
Displays comments assigned to devices for easier program reading.
Assigns statements and notes to program steps or pointers for readability.
Details the four types of program execution: Initial, Scan, Low-speed, and Standby.
Explains the operation processing of the PLC CPU in each status.
Makes various settings that are required for the CPU module system.
Sets the number of points, latch range, etc., for each device.
Lists cases where a memory card is required.
Guides on selecting memory card capacity based on file types and sizes.
Lists the general specifications common to various modules.
Describes the names of module parts and their settings.
Describes the specifications of the power supply modules.
Guides on selecting a power supply module based on current consumption.
Explains specifications of main and extension base units.
Provides specifications for extension cables used with the QnACPU system.
Lists the specifications of memory cards compatible with QnACPU.
Provides handling precautions for memory cards.
Details specifications for CPU module and memory card batteries.
Explains the concept of fail-safe circuits for PLC failure and system design.
Provides precautions for installing the main base unit and extension base unit.
Details procedures for installing or removing modules to/from the base unit.
Describes details of wiring used in systems, including power and I/O cables.
Outlines criteria for emission and immunity to meet EMC directives.
Provides guidelines for installing the PLC within a control panel.
Lists recommended daily inspection items for maintaining the PLC.
Outlines inspection items to be conducted periodically (six months to a year).
Explains procedures for replacing CPU module and memory card batteries.
Outlines basic points for effective troubleshooting.
Provides a flowchart for identifying and resolving errors based on symptoms.
Lists error codes, their contents, causes, and corrective actions.
Explains common input and output circuit faults and their corrective actions.
Lists sequence, association, output, shift, and master control instructions.
Describes comparison operations for 16-bit, 32-bit, and real number data.
Explains logical operation instructions like AND, OR, XOR.
Details instructions specific to QnA link systems.
Describes PID control instructions.
Lists instructions compatible with all versions for special function modules.
Lists and explains special relays used for system functions.
Lists and explains special registers used for system diagnostics and control.
Details instructions that may require modification after A to QnA conversion.
Explains how to set parameters for Constant Scan and Error Check functions.
Describes the I/O control modes for QnACPU and other series.
Explains data link systems and conversion considerations.
Details how index registers change during program processing transfers.
Explains the CHK and IX instructions and their conversion.
Covers accessing file registers outside the setting range.
Lists error codes based on the location where the error was detected.
Provides external dimensions for CPU modules.
Explains factors contributing to QnACPU scan time.
