Philips Q552.2E - Page 52

Circuit Descriptions
EN 52 Q552.2E LA7.
2011-Jun-01
back to
div. table
7.1.3 SSB Cell Layout
Figure 7-2 SSB layout cells (top view)
19100_058_110217.eps
110217
9187
O
U
T
0
1
2
3
CTRL
HDMI
HDMI HDMI
SPDIF
Output
VGA
HDMI
3D
DDR2
DDR2
DDR2
DDR2
FLASH
PNX85500
M1
27x27
1.00mm
DDR
ETH
I²S
SPDIF
ANA
AUD
ANA
VID
STDBY
GPIO
HDMI
CA
TS-
IN
LVDS-OUT
USB
Class-D
DC/DC
Ambilight
CPLD
C
Process Support Wire
Head
Phone
L/R
1F24
SVC
SCART1/YPbPr
SD-SLOT
LONG
PCMCIA
P
N
X
8
5
5
0
0
M
1
2
7
x
2
7
1
.
0
0
m
m
D
D
R
E
T
H
I
²
S
S
P
D
I
F
A
N
A
A
U
D
A
N
A
V
I
D
S
T
D
B
Y
G
P
I
O
H
D
M
I
C
A
T
S
-
I
N
L
V
D
S
-
O
U
T
U
S
B
Heatsink
DVB-S DC/DC
1M59
USB2.0
DVB-S DC/DC
T
DVB-S2
Hybrid
Tuner
uner
CD
7E01
1M95 1M99
1M71
1E32
17351D381M20
1G501G51
1M21
F-type
13.65mm
YLR
Pb
Pr