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Physio Control LIFEPAK 9 - Page 29

Physio Control LIFEPAK 9
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Energy
Monitor
Serial
Data
Interface
Analog
Voltage
Evaluation
©
August
1993
Physio—Control
Description
1
The
Energy
Monitor
circuit
confirms
the
level
of
energy
that
is
discharged
into
the
internal
test
load.
When
an
energy
transfer
is
performed
as
a
test,
this
circuit
senses
the
energy
delivered
to
the
test
load
and
informs
the
System
microprocessor.
The
System
microprocessor
then
displays
the
information
(e.g.,
200J
DELIVERED).
The
value
of
the
defibrillation
pulse
is
acquired
by
monitoring
the
delivered
energy
with
a
current
transformer,
T3.
A
proportional
current
is
generated
in
the
secondary
with
each
transfer
pulse.
A
rectifier
bridge,
CR8
through
CR10,
delivers
the
secondary
current
to
C10.
The
voltage
is
indexed
in
the
System
microprocessor
to
a
specific
delivered
energy.
Capacitor
C10
must
start
each
transfer
cycle
with
OV
for
accurate
evaluation
of
the
delivery.
FET
O8
is
in
parallel
with
C10
and
resets
C10
before
each
charge
energy
pulse.
The
gate
of
O8
is
driven
by
the
inverted
Charge
Inhibit
signal.
The
FET
O8
shorts
C10
when
the
charge
is
enabled
which
makes
sure
that
each
time
the
instrument
is
ready
to
deliver
energy,
the
Energy
Monitor
circuit
determines
the
correct
energy
level.
Op
amp
UIA
functions
as
a
noninverting
buffer,
providing
high-impedance
isolation
from
the
rest
of
the
signal
processing
circuitry.
The
Serial
Data
Interface
consists
of
four
lines;
Converter
Data
In
and
Converter
Data
Out
allow
communication
while
Converter
Function
Select
and
I/O
Clock
control
data
flow.
The
Analog
Voltage
Evaluation
circuit
and
the
D/A
converter
U18,
used
with
the
Capacitor
Charge
Control
circuit,
share
this
common
set
of
serial
lines
for
communication
with
the
System
microprocessor.
A
low
on
the
Converter
Function
Select
line
at
connector
P14
pin
7A
enables
the
Analog
Voltage
Evaluation
circuit
for
data
transfer.
The
data
flow
rate
is
set
by
I/O
Clock
at
P14
pin
6A.
A
high
on
the
Converter
Function
Select
line
at
P14
enables
8-bit
shift
registers
U19
and
U20,
allowing
VO
Clock
access
to
the
register
clock
inputs.
Information
on
the
Converter
Data
Out
line
is
stored
in
the
low-order
location,
and
all
other
bits
are
advanced
one
position
during
the
positive-going
transitions
of
YO
Clock.
At
the
same
time,
U12A
through
U12C
route
the
output
data
on
the
Converter
Data
In
line.
A
logic
high
at
U11C
pin
8
following
a
byte
transfer
indicates
a
communication
failure.
The
Analog
Voltage
Evaluation
circuit
monitors
operating
voltages
on
the
Power
Conversion
PCB.
An
A/D
converter,
U9,
converts
these
voltages
to
digital
code
for
evaluation
for
correct
tolerances
by
the
System
microprocessor.
All
Rights
Reserved
1-15

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