Physio Control LIFEPAK 9 - Page 38

LIFEPAK 9 defibrillator/monitor
System Controller The System Controller circuit receives input signals from the front panel
keypad and sends commands to the CRT, recorder, and defibrillation circuits.
The central component of this circuit is System microprocessor U30, together
with external RAM and ROM devices. The System microprocessor converts
the ECG echo pulse widths to sample values for the CRT and recorder.
These ECG samples are then sent to the Display/Recorder microprocessor for
filtering and display on the CRT.
U30 communicates with the Display/Recorder microprocessor (U1) through
two asynchronous serial transmit and receive lines at pins 12 and 13. In
addition to the three 8-bit I/O ports contained in U30, 16 extra output lines
are created by routing DO through D7 in parallel out to octal latches U19 and
U20.
The operating software for the System Controller is contained in U27, a
32k x 8 EPROM. Battery-backed RAM U28A provides data storage,
including the calibration constants. DIP (Dual In-line Package) socket U28B
contains the lithium energy cell and real-time clock information. Address
decoding is performed by 3-to-8 decoder U25 using only the outputs at
pins 12, 13, and 14.
Multi-vibrator U26 and flip-flop U16 form the watchdog circuit for the
System microprocessor and the Display/Recorder microprocessor. The
watchdog circuit monitors the 1.8ms preamp trigger pulse and resets both
microprocessors if the pulse width is out of tolerance. An RC network
consisting of R46 and C31 is used by U26 to detect a pulse width that is too
short; R47 and C33 detect a pulse width that is too long.
Controller U46 monitors the +5V supply and causes a system reset as
needed. This protects the RAM memory and prevents spurious
microprocessor activity. If the controller detects that the +5V supply is out
of tolerance, the output at NOT CEO switches high and causes Q5 to
conduct, pulling the voltage at R45 low. This low logic level (through U23C,
U18A, and U17A) goes to the RESET lines for the System microprocessor
and the Display/Recorder microprocessor.
Front and Rear Panel Controls Interface. Signals from the front and rear
panels are distributed to the System microprocessor which determines what
function(s) to activate. Input from the pushbuttons on the front and rear
panels are arranged in a matrix of five columns (CAS 1 through 5) and three
rows (RAS 1 through 3). The System microprocessor functions as a
multiplexer, providing a high logic level for each row and sensing any closed
column switch.
Audio Alarms. The System microprocessor switches the audio alarm on and
off and controls the volume. A piezoelectric transducer on the Interconnect
PCB produces an audible tone in response to input from the System
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