Renesas RH850 User Manual

RH850/U2A 292pin 7. Connectors
R20UT4970ED0101 Rev.1.01 Page 42 of 67
July 08, 2022
7.2 Debug Connector CN4
Table 7.4 On-chip debug connector CN4
Pin Function Device port Pin Function Device port
1
TDCK / LPDCLK /
FPCK
JP0_2 2 GND
3 TRSTZ 4 FLMD0
5 TDO / LPDO / FPDT JP0_1 6 ‒
7 TDI / LPDIO / FPDR JP0_0 8 E0VCC
9 TMS JP0_3 10 ‒
11 RDY / LPDCLKOUT JP0_5 12 GND
13 RESETZ 14 GND
7.3 RHSIF/MSIP Connector CN5
Table 7.5 RHSIF/MISP connector CN5 cont'd
Pin JP1[2-1] JP1[2-3]
Device port Function Device port Function
1 P2_13 HSIF0_TXDP / MSPI0_SOP P2_11 HSIF0_RXDP / MSPI0_SIP
2 P2_15 MSPI0_SCKP P2_15 MSPI0_SCKP
3 P2_12 HSIF0_TXDN / MSPI0_SON P2_10 HSIF0_RXDN / MSPI0_SIN
4 P2_14 MSPI0_SCKN P2_14 MSPI0_SCKN
5 ‒ GND ‒ GND
6 P2_9 HSIF0_REFCLK / MSPI0CSS4 P2_9 HSIF0_REFCLK / MSPI0CSS4
7 P2_11 HSIF0_RXDP / MSPI0_SIP P2_13 HSIF0_TXDP / MSPI0_SOP
8 ‒ GND ‒ GND
9 P2_10 HSIF0_RXDN / MSPI0_SIN P2_12 HSIF0_TXDN / MSPI0_SON
10 ‒ GND ‒ GND
11 ‒ GND ‒ GND
12 ‒ GND ‒ GND

Renesas RH850 Specifications

General

Memory Protection	Yes
CPU Cores	Single, Dual
Package	LQFP, BGA
Target Applications	Automotive, Industrial
Functional Safety	ISO 26262 ASIL-D compliant
Communication Interfaces	CAN, Ethernet, SPI, I2C, UART