Sanyo PLC-XF60A - LCD Drive Stage Diagram

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SDATA_GAM
IC501
R-D/A S&H-
1
<L3E06080D0>
IC9401
AI
<JS1110074>
IC2401
LAMP CONTROL
<uPD65943GC>
IC801
CPU SH
3
<HD6417727
>
IC6201
FPGA
<EP1C4F400C8>
IC9402
DRAM
IC4481
IC5826
DAC
IC6721
IC1305
FLASH MEMORY
<MBM29DL32>
IC1301-IC1304
DDR SDRAM
<EDD2516>
IC1501
R-D/A S&H-
2
<L3E06080D0>
IC3501
R-LEVEL SHIF
T
<L3E01031F0>
R-LCD PANEL
IC401
DIGITAL GAMMA
&
TIMMING
CONTROL
<L3E07090K0>
IC301
SCAN CONVERTER
<PW388-10L>
IC521
G-D/A S&H-
1
<L3E06080D0>
IC1521
G-D/A S&H-
2
<L3E06080D0>
IC3521
G-LEVEL SHIFT
<L3E01031F0>
G-LCD PANEL
IC541
B-D/A S&H-
1
<L3E06080D0>
IC1541
B-D/A S&H-
2
<L3E06080D0>
IC3541
B-LEVEL SHIF
T
<L3E01031F0>
B-LCD PANEL
TP_RVID1
TP_RVID2
TP_GVID1
TP_GVID2
TP_BVID1
TP_BVID2
SC_DVSYNC
SC_DHSYNC
PNL_HOUT
PNL_HOUT
SCLK_GAM
STB_GAMMA
PNL_CLKOUT
CLK0_GAMMA
VRST
K2541 K2521 K2501
K4403
K4406
K4401
K6703
K304
K4401
K301
K301
PNL_VOUT
SC_DCLK
BAIN(0-9) GAIN(0-9) RAIN(0-9)
BAIN(0-9) GAIN(0-9) RAIN(0-9)
SC_A[0-21] SC_D[0-14]
MMD[0-15] RMA[0-12] RKA[0-12]
ICPU_DT(0-7) ICPU_AD(0-4)
ICPU_DT(0-15)) ICPU_AD(1-23)
ICPU_DT(0-15)) ICPU_AD(1-23)
14
93,21,9
4
237
62 60
24
J17
142
6
73
136 135
38
15
37 35
11 12 14
143
142
231
11
9
GM_R
GM_G
GM_B
DVSYNC
SC_DCLK
TPG_DCLK
TPGMVIN
TPGMHIN
DHSYNC
MAIN
LCD DRIV
E
1
19 20
41,42,4
3
STB_GAM_CPU
Fig.3 LCD drive stage
Chassis Description & Troubleshooting