Name: Schweitzer Engineering Laboratories SEL-700G1
Brand: Schweitzer Engineering Laboratories
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SEL-700G

Generator and Intertie

Protection Relays

Instruction Manual

SEL-700G0

SEL-700G1

SEL-700GT

SEL-700GW

20170814

*PM700G-01-NB*

Default Chapter3
- Table of Contents3
List of Tables7
List of Figures15
Preface23
- Manual Overview23
- Safety Information24
- Conventions28
Section 1: Introduction and Specifications33
- Overview33
- Features33
- Table 1.1 Current (ACI) and Voltage (AVI) Card Selection for SEL-700G Models34
- Table 1.2 Protection Elements in SEL-700G Models34
- Table 1.3 Recommended Protection Elements by Generator Grounding Method36
- Models, Options, and Accessories37
- Applications39
- Getting Started40
- Figure 1.1 Typical Current Connections40
- Table 1.4 SEL-700G Serial Port Settings41
- Figure 1.2 Response Header41
- Figure 1.3 STA Command Response-No Communications Card or EIA-232/EIA-485 Communications Card42
- Figure 1.4 STA Command Response-Communications Card/Devicenet Protocol42
- Specifications44
Section 2: Installation53
- Overview53
- Relay Placement53
- I/O Configuration54
- Figure 2.1 Relay Panel-Mount Dimensions54
- Figure 2.2 Slot Allocations for Different Cards55
- Table 2.1 Power Supply Inputs (PSIO/2 DI/3 DO) Card Terminal Designations56
- Table 2.2 Communications Ports56
- Table 2.3 Communications Card Interfaces and Connectors57
- Table 2.4 Current/Voltage Inputs (3 ACI/4 AVI) Card Terminal Designations58
- Table 2.5 Current/Voltage Inputs (3 ACI/2 AVI) Card Terminal Designations59
- Table 2.6 Currents Inputs (3 ACIE) Card Terminal Designations59
- Table 2.7 Voltage Inputs (2 AVI) Card Terminal Designations60
- Table 2.8 Current/Voltage Inputs (4 ACI/3 AVI) Card Terminal Designations60
- Table 2.9 Current Inputs (3 ACIZ) Card Terminal Designations61
- Table 2.10 Current Input (1 ACI) Card Terminal Designation61
- Table 2.11 Four Analog Inputs/Four Analog Outputs (4 AI/4 AO) Card Terminal Designations62
- Table 2.12 I/O (3 DI/4 DO/1 AO) Card Terminal Designations62
- Table 2.13 RTD (10 RTD) Card Terminal Designations63
- Table 2.14 Four Digital Inputs/Four Digital Outputs (4 DI/4 DO) Card Terminal Designations63
- Table 2.15 Eight Digital Inputs (8 DI) Card Terminal Designations64
- Table 2.16 Eight Digital Outputs (8 DO) Card Terminal Designations64
- Table 2.17 Four Digital Inputs, One Form B Digital Output, Two Form C Digital Outputs (4 DI/3 DO) Card Terminal Designations65
- Figure 2.3 Circuit Board of Analog I/O Board, Showing Jumper Selection68
- Figure 2.4 JMP1 through JMP4 Locations on 4 AI/4 AO Board69
- Figure 2.5 Current Output Jumpers69
- Figure 2.6 Voltage Output Jumpers69
- Table 2.18 Jumper Functions and Default Positions70
- Rear-Panel Connections71
- Figure 2.8 SEL-700G1+ with Dual-Fiber Ethernet, Fast Hybrid 4 DI/4 DO, 10 Rtds, 3 ACI/2 AVI, 4 ACI/3 AVI (MOT 0700G11ACA9X76850830)71
- Figure 2.9 SEL-700GT+ with Dual Copper Ethernet, 4 DI/4 DO, 8 DO, 3 ACI/4 AVI, 4 ACI/3 AVI (MOT 0700GT1A2X75850630)71
- Figure 2.10 SEL-700GW with Copper Ethernet, 4 DI/4 DO, 4 AI/4 AO, 3 ACIE, 3 ACIZ72
- Figure 2.11 Control I/O Connections-4 AI/4 AO Option in Slot D73
- Table 2.19 Typical Maximum RTD Lead Length74
- Figure 2.12 Control I/O Connections-Internal RTD Option74
- AC/DC Control Connection Diagrams75
- Figure 2.13 Analog Output Wiring Example75
- Figure 2.14 Output OUT103 Relay Output Contact Configuration75
- Figure 2.15 OUT103 Contact Fail-Safe and Nonfail-Safe Options76
- Figure 2.16 Voltage Connections77
- AC/DC Connections and Applications78
- Figure 2.17 SEL-700G0 Relay AC Connection Example-High-Impedance Grounded Generator Without Current Differential Protection78
- Figure 2.18 SEL-700G0 Relay AC Connection Example-Solidly Grounded Generator with Ground Differential Protection (87N)78
- Figure 2.19 SEL-700G0+ Relay High-Impedance Grounded Generator with Synchronism Check and Without Current Differential Protection79
- Figure 2.20 SEL-700G1+ Relay AC Connection Example-High-Impedance Grounded Generator with Step-Up Transformer Included in Differential Zone (with Synchronism Check and 100% Stator Ground Protection)79
- Figure 2.21 SEL-700G1+ Relay AC Connection Example-High-Impedance Grounded Generator with Split-Phase Current Differential Protection80
- Figure 2.22 SEL-700G1+ Relay High-Impedance Grounded Generator with Split-Phase, Self-Balancing Differential Protection80
- SEL-700G1+ Generator Relay Application Example81
- Figure 2.23 SEL-700G1+ Relay Typical AC Current and Four-Wire Wye Voltage Connection with MOT SEL-0700G11A2XBA7685023181
- Figure 2.24 SEL-700G1+ Typical DC External Connections82
- SEL-700G1+ Generator Relay Application Example 283
- Figure 2.25 SEL-700G1+ Relay AC Connection Example, Multiple High-Impedance Grounded Generators Connected to a Common Bus, with 67N and Other Protection84
- SEL-700GT+ Intertie Relay Application85
- Figure 2.26 SEL-700GT+ Relay Typical AC Current and Four-Wire Wye Voltage Connection85
- Figure 2.27 SEL-700GT+ Typical DC External Connections86
- SEL-700GW Wind Generator Relay Application87
- Figure 2.28 SEL-700GW Dual Feeder AC Current Connections87
- Figure 2.29 SEL-700GW Typical DC External Connections87
- Thermal Protection of Generator and Prime Mover88
- Field Ground Protection of Generator88
- Figure 2.30 Generator Thermal Protection with an SEL-2600 RTD Module and an SEL-700G88
- Field Serviceability89
- Figure 2.31 Field Ground Protection with an SEL-700G Relay89
Section 3: PC Software91
- Overview91
- Table 3.1 SEL Software Solutions91
- Setup92
- Table 3.2 AC SEL ERATOR Quickset SEL-5030 Software92
- Figure 3.1 Serial Port Communication Dialog Box92
- Terminal93
- Figure 3.2 Serial Port Communication Parameters Dialog Box93
- Figure 3.3 Network Communication Parameters Dialog Box93
- Figure 3.4 Communications Menu93
- Figure 3.5 Device Response to the ID Command94
- Settings Database Management and Drivers95
- Settings96
- Table 3.3 File/Tools Menus97
- Figure 3.6 Selection of Drivers97
- Figure 3.7 Update Part Number97
- Figure 3.8 New Setting Screen98
- Figure 3.9 Expressions Created with Expression Builder99
- Event Analysis100
- Figure 3.10 Composite Screens for Retrieving Events100
- Figure 3.11 Generator Synchronism Report101
- Meter and Control102
- Figure 3.12 Saving the Retrieved Event102
- Figure 3.13 Device Overview Screen103
- Figure 3.14 Control Screen104
- Figure 3.15 Remote Operation Selection104
- AC SEL ERATOR Quickset Help105
- Table 3.4 Quickset Help105
- Figure 3.16 Synchroscope105
Section 4: Protection and Logic Functions Overview108
- Application Data109
- Group Settings (SET Command)109
- Table 4.1 Identifier Settings109
- Table 4.2 Configuration Settings110
- Figure 4.1 Phase Rotation Setting111
- Figure 4.2 Percentage Restraint Differential Characteristic113
- Figure 4.3 Winding X Compensated Currents114
- Figure 4.4 Differential Element (87-1) Quantities114
- Figure 4.5 Differential Element Logic116
- Figure 4.6 Differential Element Harmonic Blocking Logic116
- Table 4.3 Differential Element Settings118
- Figure 4.7 Differential Element Output Logic118
- Figure 4.8 Differential Current Alarm Logic Diagram119
- Figure 4.9 Delta Irtn and Delta Iopn External Event Detector Logic121
- Figure 4.10 Second-Harmonic External Event Detector Logic122
- Figure 4.11 High Security Mode RESET Logic122
- Figure 4.12 AO87P2 Logic123
- Figure 4.13 Winding Connections, Phase Shifts, and Compensation Direction127
- Figure 4.14 Example 1 for Wnctc Selection129
- Figure 4.15 Effect of X_CUR_IN Setting on Residual Current (IG)138
- Table 4.4 Ground Differential Settings139
- Figure 4.16 87N Element Logic Diagram139
- Figure 4.17 REF Enable Logic141
- Figure 4.18 REF Directional Element141
- Table 4.5 Restricted Earth Fault Settings142
- Figure 4.19 REF Protection Output (Extremely Inverse-Time O/C)142
- Figure 4.20 Effect of X_CUR_IN Setting on Polarizing Current143
- Figure 4.21 64G Element Operating Characteristic145
- Table 4.6 Stator Ground Protection Settings146
- Figure 4.22 64G Logic Diagram151
- Figure 4.23 Field Ground Protection (64F) Elements Logic152
- Table 4.7 Field Ground Protection Settings153
- Table 4.8 Compensator Distance Protection Settings154
- Figure 4.24 Three-Phase Distance Element Operating Characteristics156
- Figure 4.25 Phase-To-Phase Distance Element Operating Characteristics156
- Figure 4.26 Zone 1 Compensator Element Logic157
- Figure 4.27 Compensator Distance Element Logic157
- Table 4.9 Voltage Controlled/Restraint Time OC Protection Settings158
- Figure 4.28 Voltage-Controlled Phase Time-Overcurrent Element 51CT161
- Figure 4.29 Voltage-Restrained Phase Time-Overcurrent Element 51VT161
- Figure 4.30 51V Element Voltage Restraint Characteristic162
- Table 4.10 Loss-Of-Field Protection Settings163
- Figure 4.31 Loss-Of-Field Logic Diagram163
- Figure 4.32 Loss-Of-Field Element Operating Characteristic, Negative Zone 2 Offset166
- Table 4.11 Current Unbalance Settings167
- Figure 4.33 Loss-Of-Field Element Operating Characteristic, Positive Zone 2 Offset167
- Figure 4.34 Negative-Sequence Overcurrent Element Logic Diagram169
- Figure 4.35 Negative-Sequence Time-Overcurrent Operating Characteristic170
- Table 4.12 Thermal Overload Settings171
- Figure 4.36 Simplified Thermal Model, Generator171
- Figure 4.37 Generator Overload Curve172
- Figure 4.38 Volts/Hertz Element Logic173
- Figure 4.39 Dual-Level Volts/Hertz Time-Delay Characteristic 24CCS = DD174
- Figure 4.40 Composite Inverse/Definite-Time Overexcitation Characteristic, 24CCS = ID174
- Table 4.13 Volts-Per-Hertz Settings175
- Figure 4.42 Volts/Hertz Inverse-Time Characteristic, 24IC177
- Figure 4.43 Volts/Hertz Inverse-Time Characteristic, 24IC178
- Table 4.14 Frequency Accumulation Settings180
- Figure 4.44 Example Turbine Operating Limitations During Abnormal Frequency181
- Figure 4.45 Abnormal Frequency Protection Logic Diagram182
- Table 4.15 Out-Of-Step Protection Settings183
- Figure 4.46 Single-Blinder Scheme Operating Characteristics184
- Figure 4.47 Single-Blinder Scheme Logic Diagram185
- Figure 4.48 Single-Blinder Typical Settings187
- Figure 4.49 Double-Blinder Scheme Operating Characteristics187
- Figure 4.50 Double-Blinder Scheme Logic Diagram189
- Figure 4.51 Double-Blinder Typical Settings191
- Table 4.16 Inadvertent Energization Protection Settings192
- Figure 4.52 Inadvertent Energization Logic Diagram192
- Table 4.17 Phase Overcurrent Settings193
- Table 4.18 Neutral Overcurrent Settings194
- Figure 4.53 SEL-700G0, SEL-700G1, SEL-700GT+ Instantaneous Overcurrent Element Logic (Generator Protection)195
- Figure 4.54 SEL-700GT Instantaneous Overcurrent Element Logic (Intertie Protection)196
- Figure 4.55 Instantaneous Overcurrent Element Logic (Feeder Protection, SEL-700GW)197
- Figure 4.56 SEL-700G0, SEL-700G1, SEL-700GGT Instantaneous Neutral-Ground Overcurrent Element Logic (Generator Protection)198
- Figure 4.57 Ground Fault Protection Using Core-Balance CT198
- Table 4.19 Residual Overcurrent Settings199
- Table 4.20 Negative-Sequence Overcurrent Settings199
- Table 4.21 Maximum Phase Time-Overcurrent Settings200
- Figure 4.58 Maximum Phase Time-Overcurrent Elements200
- Table 4.22 Negative-Sequence Time-Overcurrent Settings201
- Figure 4.59 Negative-Sequence Time-Overcurrent Elements201
- Table 4.23 Neutral Time-Overcurrent Settings202
- Table 4.24 Residual Time-Overcurrent Settings202
- Figure 4.60 Neutral Time-Overcurrent Element 51NT202
- Figure 4.61 Residual Time-Overcurrent Elements203
- Table 4.25 Equations Associated with U.S. Curves204
- Table 4.26 Equations Associated with IEC Curves204
- Figure 4.62 U.S. Moderately Inverse Curve: U1205
- Figure 4.63 U.S. Inverse Curve: U2205
- Figure 4.64 U.S. very Inverse Curve: U3205
- Figure 4.65 U.S. Extremely Inverse Curve: U4205
- Figure 4.66 U.S. Short-Time Inverse Curve: U5206
- Figure 4.67 IEC Class a Curve (Standard Inverse): C1206
- Figure 4.68 IEC Class B Curve (very Inverse): C2206
- Figure 4.69 IEC Class C Curve (Extremely Inverse): C3206
- Figure 4.70 IEC Long-Time Inverse Curve: C4207
- Figure 4.71 IEC Short-Time Inverse Curve: C5207
- Figure 4.72 General Logic Flow of Directional Control for Residual Ground Overcurrent Elements208
- Figure 4.73 General Logic Flow of Directional Control for Neutral-Ground Overcurrent Elements208
- Table 4.27 Available Ground Directional Elements209
- Table 4.28 Best Choice Ground Directional Element Logic210
- Table 4.29 Ground Directional Element Availability by Voltage Transformer Connections on X Side210
- Table 4.30 Ground Directional Element Availability by Voltage Transformer Connections on y Side211
- Figure 4.74 Internal Enables (DIRQE and DIRQGE) Logic for Negative-Sequence Voltage-Polarized Directional Elements214
- Figure 4.75 Internal Enables (DIRVE and DIRIE) Logic for Zero-Sequence Voltage-Polarized Directional Element with IG as Operate Quantity and Channel in Current-Polarized Directional Element215
- Figure 4.76 Internal Enables (DIRNE) Logic for Zero-Sequence Voltage-Polarized Directional Element with in as Operate Quantity215
- Figure 4.77 Negative-Sequence Voltage-Polarized Directional Element for Residual-Ground Overcurrent Elements216
- Figure 4.78 Zero-Sequence Voltage-Polarized Directional Element for Residual-Ground Overcurrent Elements217
- Figure 4.79 Channel in Current-Polarized Directional Element218
- Figure 4.80 Zero-Sequence Voltage-Polarized Directional Element for Neutral-Ground Overcurrent Elements219
- Figure 4.81 Routing of Directional Elements to Residual-Ground Overcurrent Elements220
- Figure 4.82 Routing of Neutral Directional Element to Neutral-Ground Overcurrent Elements220
- Figure 4.83 Direction Forward/Reverse Logic for Residual-Ground Overcurrent Elements221
- Figure 4.84 Direction Forward/Reverse Logic for Neutral-Ground Overcurrent Elements221
- Figure 4.85 General Logic Flow of Directional Control for Negative-Sequence and Phase Overcurrent Elements222
- Figure 4.86 Negative-Sequence Voltage-Polarized Directional Element for Negative-Sequence and Phase Overcurrent Elements224
- Figure 4.87 Positive-Sequence Voltage-Polarized Directional Element for Phase Overcurrent Elements225
- Figure 4.88 Routing of Directional Elements to Negative-Sequence and Phase Overcurrent Elements226
- Figure 4.89 Direction Forward/Reverse Logic for Negative-Sequence Overcurrent Elements226
- Table 4.31 Directional Element Settings for X Side and y Side227
- Figure 4.90 Direction Forward/Reverse Logic for Phase Overcurrent Elements227
- Table 4.32 Directional Control Settings Not Made for Particular Conditions230
- Table 4.33 Overcurrent Elements Controlled by Level Direction Settings DIR1X, DIR2X, DIR1Y, and DIR2Y230
- Table 4.34 Relay Word Bits Associated with X-Side and Y-Side Overcurrent Elements230
- Table 4.35 Z Constant for Z2R Setting233
- Table 4.36 Z Constant for Z0R Setting236
- Figure 4.91 Zero-Sequence Impedance Network and Relay Polarity237
- Figure 4.92 Zero-Sequence Impedance Plot for Solidly-Grounded, Mostly Inductive System237
- Figure 4.93 Hybrid Power System with Neutral-Ground Resistor238
- Table 4.37 Load-Encroachment Settings240
- Figure 4.94 Load-Encroachment Logic for X Side241
- Figure 4.95 Load-Encroachment Logic for y Side242
- Table 4.38 Power Element Settings244
- Figure 4.96 Three-Phase Power Elements Logic245
- Figure 4.97 Power Elements Operation in the Real/Reactive Power Plane246
- Table 4.39 Signals Used for Frequency Measurement and Tracking247
- Table 4.40 Frequency Settings248
- Figure 4.98 X-Side Over- and Underfrequency Element Logic248
- Table 4.41 Rate-Of-Change-Of-Frequency Settings249
- Figure 4.99 Y-Side Over- and Underfrequency Element Logic249
- Table 4.42 Time Window Versus 81Rmntp Setting250
- Figure 4.100 81R Frequency Rate-Of-Change Scheme Logic250
- Table 4.43 Undervoltage Settings252
- Table 4.44 Overvoltage Settings253
- Figure 4.101 Undervoltage Element Logic254
- Figure 4.102 Overvoltage Element Logic255
- Table 4.45 RTD Settings256
- Figure 4.103 Zero-Sequence Overvoltage Elements (59G)256
- Figure 4.104 Channel VS Voltage Elements (27S, 59S)256
- Table 4.46 RTD Resistance Versus Temperature258
- Table 4.47 X-Side Synchronism-Check Settings259
- Figure 4.105 Synchronism-Check Function Voltage Elements261
- Figure 4.106 Synchronism-Check Function Voltage Element Characteristic261
- Figure 4.107 Synchronism-Check Function 25RCFX and SYNCPX/SYNCPY Setting Examples262
- Figure 4.108 Synchronism-Check Function Slip Elements263
- Figure 4.109 Synchronism-Check Function Angle Elements264
- Figure 4.110 Breaker Close Failure Logic Diagram264
- Figure 4.111 Synchronism-Check Function Angle Characteristics265
- Figure 4.112 Synchronism-Check Voltage Window and Slip Frequency Elements271
- Figure 4.113 Synchronism-Check Elements272
- Table 4.48 Synchronism-Check Settings273
- Figure 4.114 Angle Difference between VPY and VS Compensated by Breaker Close Time (Fpy < Fs and VPY Shown as Reference in this Example)276
- Figure 4.115 Overall Functional Block Diagram279
- Table 4.49 Autosynchronism Settings280
- Figure 4.116 Simplified Block Diagram, Frequency and Phase Matching Elements281
- Figure 4.117 Simplified Block Diagram, Voltage Matching Elements282
- Figure 4.118 Synchroscope283
- Figure 4.119 Graphical Display of Generator Autosynchronism Report284
- Table 4.50 Loss of Potential (LOP) Settings285
- Other Settings286
- Table 4.51 Demand Meter Settings286
- Figure 4.120 Loss-Of-Potential Generic Logic (Applies to both X and y Sides)286
- Figure 4.121 Demand Current Logic Outputs287
- Figure 4.122 Response of Thermal and Rolling Demand Meters to a Step Input (Setting DMTC = 15 Minutes)288
- Figure 4.123 Voltage289
- Table 4.52 Pole Open Logic Settings291
- Figure 4.124 Pole Open Logic Diagram, Breaker 52X291
- Table 4.53 Trip/Close Logic Settings292
- Figure 4.125 Pole Open Logic Diagram, Breaker 52Y292
- Figure 4.126 Trip Logic294
- Figure 4.127 Typical Generator Trip TR Logic (SEL-700G0, SEL-700G1, SEL-700GT)295
- Figure 4.128 Typical Intertie Trip TR Logic (SEL-700GT)295
- Figure 4.129 Typical Feeder Trip TR Logic (SEL-700GW)296
- Figure 4.130 Close Logic297
- Figure 4.131 Typical Generator or Intertie Close CL Logic (SEL-700G or GT)298
- Logic Settings (SET L Command)299
- Table 4.54 Enable Settings299
- Figure 4.132 Typical Feeder Close CL Logic (SEL-700GW)299
- Figure 4.133 Schematic Diagram of a Traditional Latching Device300
- Figure 4.134 Logic Diagram of a Latch Switch300
- Table 4.55 Latch Bits Equation Settings301
- Figure 4.135 SEL OGIC Control Equation Variable/Timers SV01/SV01T-SV32T302
- Table 4.56 SEL OGIC Control Equation Operators (Listed in Operator Precedence)303
- Figure 4.136 Result of Falling-Edge Operator on a Deasserting Input305
- Table 4.59 Counter Input/Output Description309
- Table 4.60 Order of Precedence of the Control Inputs310
- Figure 4.139 Example of the Effects of the Input Precedence310
- Table 4.61 Control Output Equations and Contact Behavior Settings311
- Global Settings (SET G Command)312
- Table 4.62 General Global Settings312
- Table 4.63 Event Messenger Settings312
- Table 4.64 Setting Group Selection314
- Table 4.65 Time and Date Management Settings314
- Table 4.66 Breaker Failure Setting317
- Figure 4.140 Breaker Failure Logic317
- Figure 4.141 Analog Input Card Adaptive Name318
- Table 4.67 Summary of Steps319
- Figure 4.142 Settings to Configure Input 1 as a 4-20 Ma Transducer Measuring Temperatures between -50°C and 150°C320
- Table 4.68 Analog Input Card in Slot 3321
- Figure 4.143 Analog Output Number Allocation321
- Table 4.69 Output Setting for a Card in Slot 3322
- Figure 4.144 Analog Output Settings322
- Figure 4.145 DC Mode Processing323
- Figure 4.146 AC Mode Processing323
- Table 4.70 Slot C Input Debounce Settings324
- Table 4.71 Data Reset Settings324
- Figure 4.147 Timing Diagram for Debounce Timer Operation When Operating in AC Mode324
- Port Settings (SET P Command)325
- Table 4.72 Setting Change Disable Setting325
- Table 4.73 Time Synchronization Source Setting325
- Table 4.74 Front-Panel Serial Port Settings326
- Table 4.75 Ethernet Port Settings326
- Table 4.76 Port Number Settings that Must be Unique327
- Table 4.77 Fiber-Optic Serial Port Settings327
- Table 4.78 Rear-Panel Serial Port (EIA-232) Settings327
- Table 4.79 Rear-Panel Serial Port (EIA-232/EIA-485) Settings328
- Front-Panel Settings (SET F Command)329
- Table 4.80 Rear-Panel Devicenet Port Settings329
- Table 4.81 Display Point and Local Bit Default Settings329
- Table 4.82 LCD Display Settings329
- Table 4.83 Settings that Always, Never, or Conditionally Hide a Display Point331
- Table 4.84 Entries for the Four Strings331
- Figure 4.148 Display Point Settings332
- Figure 4.149 Front-Panel Display-Both HV and LV Breakers Open332
- Figure 4.150 Front-Panel Display-HV Breaker Closed, LV Breaker Open332
- Figure 4.151 Front-Panel Display-Both HV and LV Breakers Closed332
- Table 4.85 Binary Entry in the Name String Only333
- Figure 4.152 Front-Panel Display-LV Breaker Closed333
- Figure 4.153 Front-Panel Display-HV Breaker Open, LV Breaker Closed333
- Figure 4.154 Front-Panel Display for a Binary Entry in the Name String Only333
- Table 4.86 Analog Entry in the Name String Only334
- Figure 4.155 Front-Panel Display for an Analog Entry in the Name String Only334
- Table 4.87 Entry in the Name String and the Alias Strings335
- Table 4.88 Example Settings and Displays335
- Figure 4.156 Front-Panel Display for an Entry in (A) Boolean Name and Alias Strings and (B) Analog Name and User Text and Formatting Strings335
- Figure 4.157 Front-Panel Display for an Entry in (A) Boolean Name and Alias Strings and (B) Analog Name, User Text and Formatting Strings, and Engineering Units335
- Figure 4.158 Adding Temperature Measurement Display Points336
- Figure 4.159 Rotating Display336
- Figure 4.160 Adding Two Local Bits337
- Table 4.89 Target LED Settings338
- Table 4.90 Pushbutton LED Settings339
- Report Settings (SET R Command)340
- Table 4.91 Auto-Removal Settings340
- Table 4.92 SER Trigger Settings341
- Table 4.93 Enable Alias Settings341
- Table 4.94 SET R SER Alias Settings342
- Table 4.95 Event Report Settings342
- Table 4.96 Generator Autosynchronism Report Settings342
- DNP Map Settings (SET DNP N Command343
- Table 4.97 Generator Autosynchronism Report Data343
- Table 4.98 Load Profile Settings343
- Modbus Map Settings (SET M Command)344
- Table 4.100 User Map Register Settings344
Section 5: Metering and Monitoring345
- Overview345
- Power Measurement Conventions346
- Delta-Connected Cts346
- Metering346
- Figure 5.1 Complex Power Measurement Conventions346
- Table 5.1 Measured Fundamental Meter Values347
- Figure 5.2 METER Command Report for SEL-700G1 with Synchronism Check and Neutral Voltage Inputs348
- Table 5.2 Thermal Meter Values349
- Table 5.3 RTD Input Status Messages349
- Figure 5.3 MET T Report for SEL-700G0 Model349
- Figure 5.4 Device Response to the METER E Command350
- Figure 5.5 Device Response to the METER RE Command350
- Figure 5.6 Device Response to the METER WE Command350
- Table 5.4 Maximum/Minimum Meter Values351
- Figure 5.7 Device Response to the METER M Command352
- Figure 5.8 Device Response to the METER RM Command352
- Table 5.5 RMS Meter Values353
- Figure 5.9 Device Response to the METER MV Command353
- Figure 5.10 Device Response to the METER RMS Command354
- Figure 5.11 Device Response to the METER AI Command354
- Table 5.6 Demand Values355
- Figure 5.12 Device Response to the MET de Command355
- Figure 5.13 Device Response to the MET PE Command355
- Table 5.7 Synchrophasor Measured Values356
- Table 5.8 Measured Differential Meter357
- Table 5.9 Measured Harmonic Meter Values357
- Figure 5.14 METER DIF (Differential) Command Report357
- Load Profiling358
- Figure 5.15 METER H (Harmonic) Command Report358
- Figure 5.16 Device Response to the LDP Command358
- Breaker Monitor359
- Table 5.10 Breaker Maintenance Information for a 25 Kv Circuit Breaker359
- Table 5.11 Breaker Monitor Settings360
- Figure 5.17 Plotted Breaker Maintenance Points for a 25 Kv Circuit Breaker361
- Figure 5.18 SEL-700G Breaker Maintenance Curve for a 25 Kv Circuit Breaker362
- Figure 5.19 Operation of SEL OGIC Control Equation Breaker Monitor Initiation Setting363
- Figure 5.20 Breaker Monitor Accumulates 10 Percent Wear364
- Figure 5.21 Breaker Monitor Accumulates 25 Percent Wear365
- Figure 5.22 Breaker Monitor Accumulates 50 Percent Wear366
- Figure 5.23 Breaker Monitor Accumulates 100 Percent Wear367
- Table 5.12 Breaker Monitor Output368
- Figure 5.24 Input Inxxx Connected to Trip Bus for Breaker Monitor Initiation370
Section 6: Settings371
- Overview371
- Table 6.1 Methods of Accessing Settings371
- View/Change Settings with Front Panel372
- Figure 6.1 Front-Panel Setting Entry Example for the SEL-700GT Relay373
- View/Change Settings over Communications Port374
- Table 6.2 SHOW Command Options374
- Table 6.3 SET Command Options374
- Table 6.4 SET Command Editing Keystrokes375
- Table 6.5 SET Command Format375
- Setting Entry Error Messages376
- Table 6.6 Setting Interdependency Error Messages376
SEL-700G Settings Sheets377
- Table SET.1 Port Number Settings that Must be Unique427
Section 7: Communications445
- Overview445
- Communications Interfaces445
- Table 7.1 SEL-700G Communications Port Interfaces445
- Figure 7.1 Simple Ethernet Network Configuration447
- Figure 7.2 Ethernet Network Configuration with Dual Redundant Connections (Failover Mode)448
- Figure 7.3 Ethernet Network Configuration with Ring Structure (Switched Mode)448
- Figure 7.4 IRIG-B Input (Relay Terminals B01-B02)450
- Figure 7.5 IRIG-B Input Via EIA-232 Port 3 (SEL Communications Processor as Source)450
- Figure 7.6 IRIG-B Input VIA EIA-232 Port 3 (SEL-2401/2404/2407 Time Source)450
- Figure 7.7 IRIG-B Input VIA Fiber-Optic EIA-232 Port 2 (SEL-2030/2032 Time Source)451
- Figure 7.8 IRIG-B Input VIA Fiber-Optic EIA-232 Port 2 (SEL-2401/2404/2407 Time Source)451
- Table 7.2 EIA-232/EIA-485 Serial Port Pin Functions452
- Figure 7.9 EIA-232 DB-9 Connector Pin Numbers452
- Figure 7.10 SEL Cable C234A-SEL-700G to DTE Device452
- Figure 7.11 SEL Cable C227A-SEL-700G to DTE Device453
- Figure 7.12 SEL Cable C222-SEL-700G to Modem453
- Figure 7.13 SEL Cable C272A-SEL-700G to SEL Communications Processor (Without IRIG-B Signal)453
- Figure 7.14 SEL Cable C273A-SEL-700G to SEL Communications Processor (with IRIG-B Signal)453
- Communications Protocols454
- Table 7.3 Protocols Supported on the Various Ports454
- Figure 7.15 SEL Cable C387-SEL-700G to SEL-3010454
- Table 7.4 Settings Associated with SNTP457
- SEL ASCII Protocol and Commands458
- Table 7.5 Serial Port Automatic Messages459
- Table 7.6 Command Response Header Definitions462
- Table 7.7 Access Commands462
- Table 7.8 ANALOG Command464
- Table 7.9 ANALOG Command Format464
- Figure 7.16 BRE X Command Response466
- Figure 7.17 BRE X W Command Response467
- Figure 7.18 BRE X R Command Response467
- Table 7.10 COM Command469
- Table 7.11 CONTROL Command469
- Table 7.12 Three Remote Bit States469
- Table 7.13 COPY Command470
- Table 7.14 COUNTER Command470
- Table 7.15 Date Command470
- Table 7.16 EVENT Command (Event Reports)471
- Figure 7.19 Ethernet Port (PORT 1) Status Report471
- Figure 7.20 Non-Redundant Port Response471
- Table 7.17 EVENT Command Format472
- Table 7.18 FILE Command472
- Table 7.19 GEN Command Variants472
- Table 7.20 GSH Command Variants473
- Figure 7.21 GEN Command Response473
- Figure 7.22 GSH Command Response473
- Table 7.21 GOOSE Command Variants474
- Table 7.22 GOOSE IED Description474
- Figure 7.23 GOOSE Command Response475
- Table 7.23 GROUP Command476
- Table 7.25 HISTORY Command477
- Table 7.26 IDENTIFICATION Command477
- Table 7.27 IRI Command477
- Table 7.28 LDP Commands478
- Table 7.29 LDP Command Parameters478
- Table 7.30 L_D Command (Load Firmware)478
- Table 7.32 Meter Command479
- Table 7.33 Meter Command Parameters480
- Table 7.35 PASSWORD Command481
- Table 7.36 PAS Command Format481
- Table 7.37 Factory-Default Passwords for Access Levels 1, 2, and C481
- Table 7.38 Valid Password Characters481
- Figure 7.24 Command Sequence to Change Password481
- Figure 7.25 PING Command Response482
- Table 7.39 PUL Outnnn Command483
- Table 7.40 QUIT Command483
- Table 7.41 R_S Command (Restore S)483
- Table 7.42 SER Command (Sequential Events Recorder Report)483
- Table 7.43 SER Command Format483
- Table 7.44 SER D Command484
- Table 7.45 SET Command (Change Settings)484
- Table 7.46 SET Command Format485
- Table 7.47 SET Command Editing Keystrokes485
- Table 7.48 SHOW Command (Show/View Settings)485
- Table 7.49 SHOW Command Format486
- Figure 7.26 SHOW Command Example486
- Table 7.50 STATUS Command (Relay Self-Test Status)488
- Table 7.51 STATUS Command Report and Definitions488
- Figure 7.27 Typical Relay Output for STATUS S Command489
- Table 7.53 SYN Command490
- Table 7.54 TARGET Command (Display Relay Word Bit Status)490
- Table 7.55 TARGET Command Format490
- Table 7.56 Front-Panel Leds and the TAR 0 Command491
- Table 7.57 TIME Command (View/Change Time)491
- Table 7.58 TRIGGER Command (Trigger Event Report)491
- Table 7.59 VEC Command492
Section 8: Front-Panel Operations493
- Overview493
- Front-Panel Layout493
- Human-Machine Interface494
- Figure 8.1 Front-Panel Overview494
- Table 8.1 Front-Panel Automatic Messages (FP_AUTO := OVERRIDE)495
- Figure 8.2 Access Level Security Padlock Symbol495
- Figure 8.3 Password Entry Screen495
- Table 8.2 Front-Panel Pushbutton Functions496
- Figure 8.4 Front-Panel Pushbuttons496
- Figure 8.5 Main Menu497
- Figure 8.6 MAIN Menu and METER Submenu497
- Figure 8.7 METER Menu and ENERGY Submenu498
- Figure 8.8 Relay Response When Energy (or Max/Min, Demand, Peak Demand) Metering Is Reset498
- Figure 8.9 Relay Response When no Analog Cards Are Installed498
- Figure 8.10 Relay Response When no Math Variables Enabled498
- Figure 8.11 MAIN Menu and EVENTS Submenu499
- Figure 8.12 EVENTS Menu and DISPLAY Submenu499
- Figure 8.13 Relay Response When no Event Data Available499
- Figure 8.14 Relay Response When Events Are Cleared499
- Figure 8.15 MAIN Menu and TARGETS Submenu500
- Figure 8.16 TARGETS Menu Navigation500
- Figure 8.17 MAIN Menu and CONTROL Submenu500
- Figure 8.18 CONTROL Menu and OUTPUTS Submenu501
- Figure 8.19 CONTROL Menu and LOCAL BITS Submenu501
- Figure 8.20 MAIN Menu and SET/SHOW Submenu502
- Figure 8.21 SET/SHOW Menu503
- Figure 8.22 MAIN Menu and Status Submenu503
- Operation and Target Leds504
- Figure 8.23 MAIN Menu and BREAKER Monitor Submenu504
- Figure 8.24 Factory-Default Front-Panel Leds for the SEL-700G Generator Protection Relay504
- Table 8.3 Possible Warning Conditions (Flashing TRIP LED)505
- Figure 8.25 TARGET RESET Pushbutton506
- Figure 8.26 Operator Control Pushbuttons and Leds506
- Table 8.4 SEL-700GT and SEL-700GW Front-Panel Operator Control Functions508
- Table 8.5 SEL-700G and SEL-700G1 Front-Panel Operator Control Functions509
Section 9: Analyzing Events511
- Overview511
- Event Reporting512
- Figure 9.1 Example Event Summary513
- Table 9.1 Event Types514
- Figure 9.2 Sample Event History516
- Table 9.2 Analog Event Report Columns Definitions518
- Figure 9.3 Example Standard 15-Cycle Analog Event Report 1/4-Cycle Resolution519
- Figure 9.4 Derivation of Analog Event Report Current Values and RMS Current Values from Sampled Current Waveform524
- Figure 9.5 Derivation of Phasor RMS Current Values from Event Report Current Values525
- Figure 9.6 Sample CEV Report Viewed with Analytic Assistant or Quickset Via SEL-5601526
- Figure 9.7 Options for Converting CEV Reports to COMTRADE in Analytic Assistant526
- Table 9.3 Digital Event Report Column Definitions527
- Figure 9.8 Example Standard 15-Cycle Digital Event Report (EVE D X Command)533
- Figure 9.9 Example 15-Cycle Stator Ground Event Report (EVE GND) 1/4 Cycle Resolution534
- Table 9.4 Stator Ground Event Report (EVE GND) Digital Column Definitions for Protection, Control, and I/O Elements536
- Table 9.5 Differential Event Report Column Definitions for Analog Quantities536
- Table 9.6 Differential Event Report Digital Column Definitions for Protection, Control, and I/O Elements537
- Figure 9.10 Example Standard 15-Cycle Differential Event Report (EVE DIF2 Command)538
- Figure 9.11 Example Sequential Events Recorder (SER) Event Report540
- Figure 9.12 Example SYN Command Response540
Section 10: Testing and Troubleshooting543
- Overview543
- Testing Tools543
- Figure 10.1 Low-Level Test Interface (J2)544
- Figure 10.2 C700G Ribbon Cable Connector Diagram544
- Table 10.1 Cable C700G Connection Options545
- Table 10.2 Resultant Scale Factors for Inputs545
- Commissioning Tests547
- Figure 10.3 Three-Phase Wye AC Connections549
- Figure 10.4 Three-Phase Open-Delta AC Connections549
- Table 10.3 Serial Port Commands that Clear Relay Data Buffers550
- Table 10.4 CTRX Phase Current Measuring Accuracy551
- Figure 10.5 CTRX Current Source Connections551
- Table 10.5 CTRY Phase Current Measuring Accuracy552
- Figure 10.6 CTRY Current Source Connections552
- Figure 10.7 Wye Voltage Source Connections552
- Table 10.6 Power Quantity Accuracy-Wye Voltages553
- Figure 10.8 Delta Voltage Source Connections553
- Periodic Tests (Routine Maintenance)554
- Table 10.7 Power Quantity Accuracy-Delta Voltages554
- Table 10.8 Periodic Relay Checks554
- Self-Test555
- Table 10.9 Relay Self-Tests555
- Troubleshooting558
- Table 10.10 Troubleshooting558
- Technical Assistance559
- Table A.1 Firmware Revision History561
Appendix A: Firmware and Manual Versions Firmware562
- Table A.2 Devicenet Card Versions566
- Table A.3 EDS File Compatibility566
- ICD File567
- Table A.4 SEL-700G ICD Revision History567
- Table A.5 Instruction Manual Revision History570
Appendix B: Firmware Upgrade Instructions579
- Overview579
- Upgrade Firmware Using AC SEL ERATOR Quickset580
- Upgrade Firmware Using a Terminal Emulator584
- Figure B.1 Firmware File Transfer Process585
- Relays with IEC 61850 Option586
- Technical Assistance587
Appendix C: SEL Communications Processors589
- SEL Communications Protocols589
- Table C.1 Supported Serial Command Sets589
- Table C.2 Compressed ASCII Commands590
- SEL Communications Processor591
- Figure C.1 SEL Communications Processor Star Integration Network591
- Table C.3 SEL Communications Processors Protocol Interfaces592
- Figure C.2 Multitiered SEL Communications Processor Architecture592
- SEL Communications Processor and Relay Architecture593
- Figure C.3 Enhancing Multidrop Networks with SEL Communications Processors594
- SEL Communications Processor Example595
- Table C.4 SEL Communications Processor Port 1 Settings595
- Figure C.4 Example of SEL Relay and SEL Communications Processor Configuration595
- Table C.5 SEL Communications Processor Data Collection Automessages596
- Table C.6 SEL Communications Processor Port 1 Automatic Messaging Settings596
- Table C.7 SEL Communications Processor Port 1 Region Map596
- Table C.8 Communications Processor METER Region Map for GW Model597
- Table C.9 Communications Processor METER Region Map for G0 Model Without Synchronism597
- Table C.10 Communications Processor METER Region Map for G0 Model with Synchronism598
- Table C.11 Communications Processor METER Region Map for G1 Model Without Synchronism599
- Table C.12 Communications Processor METER Region Map for G1 Model with Synchronism599
- Table C.13 Communications Processor METER Region Map for GT Model with Single Synchronism600
- Table C.14 Communications Processor METER Region Map for GT Model with Dual Single Synchronism601
- Table C.15 Communications Processor TARGET Region602
- Table C.16 Communications Processor DEMAND Region Map603
Appendix Ddnp3 Communications605
- Overview605
- Introduction to DNP3605
- Table D.1 DNP3 Implementation Levels605
- Table D.2 Selected DNP3 Function Codes607
- Table D.3 DNP3 Access Methods608
- DNP3 in the SEL-700G610
- Table D.4 TCP/UDP Selection Guidelines610
- Table D.5 DNP3 Access Methods610
- Figure D.2 Message Transmission Timing612
- Table D.6 SEL-700G Event Buffer Capacity613
- Table D.7 Port DNP3 Protocol Settings615
- DNP3 Documentation616
- Table D.8 Serial Port DNP3 Modem Settings616
- Table D.9 SEL-700G DNP Object List617
- Table D.10 DNP3 Reference Data Map622
- Table D.11 DNP3 Default Data Map624
- Table D.12 SEL-700G Object 12 Control Operations626
- Figure D.3 Sample Response to SHO DNP Command628
- Figure D.4 Port MAP Command629
- Table D.13 Sample Custom DNP3 AI Map630
- Figure D.5 Sample Custom DNP3 AI Map Settings631
- Figure D.6 Analog Input Map Entry in Quickset Software632
- Figure D.7 AI Point Label, Scaling, and Dead Band in Quickset632
- Figure D.8 Sample Custom DNP3 BO Map Settings632
- Figure D.9 Binary Output Map Entry in Quickset Software633
Appendix E: Modbus RTU Communications635
- Overview635
- Communications Protocol635
- Table E.1 Modbus Query Fields635
- Table E.2 SEL-700G Modbus Function Codes636
- Table E.3 SEL-700G Modbus Exception Codes637
- Table E.4 01H Read Discrete Output Coil Status Command637
- Table E.5 Responses to 01H Read Discrete Output Coil Query Errors638
- Table E.6 02H Read Input Status Command638
- Table E.7 02H SEL-700G Inputs639
- Table E.8 Responses to 02H Read Input Query Errors643
- Table E.9 03H Read Holding Register Command643
- Table E.10 Responses to 03H Read Holding Register Query Errors643
- Table E.11 04H Read Input Register Command644
- Table E.12 Responses to 04H Read Input Register Query Errors644
- Table E.13 05H Force Single Coil Command644
- Table E.14 01H, 05H SEL-700G Output644
- Table E.15 Responses to 05H Force Single Coil Query Errors647
- Table E.16 06H Preset Single Register Command647
- Table E.17 Responses to 06H Preset Single Register Query Errors647
- Table E.18 08H Loopback Diagnostic Command648
- Table E.19 Responses to 08H Loopback Diagnostic Query Errors648
- Table E.20 10H Preset Multiple Registers Command648
- Table E.21 10H Preset Multiple Registers Query Error Messages649
- Table E.22 60H Read Parameter Information Command649
- Table E.23 60H Read Parameter Descriptor Field Definition649
- Table E.24 60H Read Parameter Conversion Field Definition650
- Table E.25 Responses to 60H Read Parameter Information Query Errors650
- Table E.26 61H Read Parameter Text Command651
- Table E.27 61H Read Parameter Text Query Error Messages651
- Table E.28 62H Read Enumeration Text Command651
- Table E.29 61H Read Parameter Enumeration Text Query Error Messages652
- Table E.30 7Dh Encapsulated Packet with Control Command652
- Table E.31 7Dh Encapsulated Packet Query Errors652
- Table E.32 7Eh NOP Command653
- Table E.33 Modbus Register Labels for Use with SET M Command654
- Modbus Register Map659
- Table E.34 Modbus Register Map659
Appendix F: IEC 61850 Communications687
- Features687
- Introduction to IEC 61850688
- Table F.1 IEC 61850 Document Set688
- IEC 61850 Operation689
- Table F.2 Example IEC 61850 Descriptor Components690
- Table F.3 SEL-700G Logical Devices690
- Table F.4 Buffered Report Control Block Client Access692
- Figure F.1 SEL-700G Predefined Reports692
- Table F.5 Unbuffered Report Control Block Client Access693
- Figure F.2 SEL-700G Datasets694
- Figure F.3 GOOSE Quality695
- IEC 61850 Configuration697
- Table F.6 IEC 61850 Settings697
- Logical Node Extensions699
- Table F.7 New Logical Node Extensions699
- Table F.8 Thermal Metering Data Logical Node Class Definition699
- Table F.9 Demand Metering Statistics Logical Node Class Definition700
- Table F.10 Circuit Breaker Supervision (Per-Phase) Logical Node Class Definition701
- Table F.11 Compatible Logical Nodes with Extensions701
- Table F.12 Measurement Logical Node Class Definition701
- Table F.14 Metering Statistics Logical Node Class Definition703
- Table F.15 Circuit Breaker Logical Node Class Definition703
- Logical Nodes704
- Table F.16 Logical Device: PRO (Protection)704
- Table F.17 Logical Device: MET (Metering)714
- Table F.18 Logical Device: con (Remote Control)720
- Table F.19 Logical Device: ANN (Annunciation)720
- Protocol Implementation Conformance Statement724
- Table F.20 Logical Device: CFG (Configuration)724
- Table F.21 PICS for A-Profile Support724
- Table F.22 PICS for T-Profile Support724
- Table F.23 MMS Service Supported Conformance725
- Table F.24 MMS Parameter CBB727
- Table F.25 Alternate Access Selection Conformance Statement727
- Table F.26 Variableaccessspecification Conformance Statement728
- Table F.27 Variablespecification Conformance Statement728
- Table F.28 Read Conformance Statement728
- Table F.29 Getvariableaccessattributes Conformance Statement728
- Table F.30 Definenamedvariablelist Conformance Statement728
- Table F.31 Getnamedvariablelistattributes Conformance Statement729
- Table F.32 Deletenamedvariablelist729
- ACSI Conformance Statements730
- Table F.34 ACSI Basic Conformance Statement730
- Table F.35 ACSI Models Conformance Statement730
- Table F.36 ACSI Services Conformance Statement731
Appendix G: Devicenet Communications735
- Overview735
- Devicenet Card735
- Figure G.1 Devicenet Card Component Overview735
- Features736
- Electronic Data Sheet737
Appendix H Synchrophasors739
- Overview739
- Synchrophasor Measurement740
- Figure H.1 Phase Reference740
- Figure H.2 Waveform at Relay Terminals May Have a Phase Shift741
- Figure H.3 Correction of Measured Phase Angle741
- Settings for Synchrophasors742
- Table H.1 PMU Settings in the SEL-700G for C37.118 Protocol in Global Settings742
- Table H.2 Synchrophasor Order in Data Stream (Voltages and Currents)745
- Table H.3 User-Defined Analog Values Selected by the NUMANA Setting746
- Table H.4 User-Defined Digital Status Words Selected by the NUMDSW Setting746
- Serial Port Settings for IEEE C37.118 Synchrophasors747
- Table H.5 SEL-700G Serial Port Settings for Synchrophasors747
- Ethernet Port Settings for IEEE C37.118 Synchrophasors748
- Table H.6 SEL-700G Ethernet Port Settings for Synchrophasors748
- Figure H.4 TCP Connection749
- Synchrophasor Relay Word Bits750
- Table H.7 Synchrophasor Trigger Relay Word Bits750
- Table H.8 Time-Synchronization Relay Word Bits751
- Table H.9 TQUAL Bits Translation to Time Quality751
- View Synchrophasors Using the MET PM Command752
- C37.118 Synchrophasor Protocol753
- Figure H.7 Sample MET PM Command Response753
- Table H.10 Frequency Tracking Side and Quantity Based on the SEL-700G Model754
- Table H.11 Size of a C37.118 Synchrophasor Message755
- Table H.12 Serial Port Bandwidth for Synchrophasors (in Bytes)755
- IEEE C37.118 PMU Setting Example756
- Table H.13 Example Synchrophasor Global Settings757
- Table H.14 Example Synchrophasor Logic Settings757
- Table H.15 Example Synchrophasor SEL OGIC Settings758
- Table H.16 Example Synchrophasor Port Settings758
Appendix I: MIRRORED BITS Communications759
- Overview759
- Operation759
- Settings763
- Table I.4 MIRRORED BITS Communications Message Transmission Period763
- Table I.5 MIRRORED BITS Protocol Settings763
- Table J.1 SEL-700G Relay Word Bits765
Appendix J: Relay Word Bits Overview766
- Table J.2 Hidden Overcurrent Element Relay Word Bits Per the SEL-700G Model769
- Definitions771
- Table J.3 Relay Word Bit Definitions for the SEL-700G771
- Table K.1 Analog Quantities794
- Table 4.99 DNP Map Settings810
- Table 7.34 Meter Class810
- Table 7.52 SUMMARY Command811

Schweitzer Engineering Laboratories SEL-700G1 User Manual

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Brand	Schweitzer Engineering Laboratories
Model	SEL-700G1
Category	Relays
Language	English