H.19
Date Code 20170814 Instruction Manual SEL-700G Relay
Synchrophasors
IEEE C37.118 PMU Setting Example
The protection settings are not shown.
The protection engineer performs a bandwidth check, using Table H.11, and
determines the necessary message size. The system requirements, in order of
appearance in Table H.11, are:
➤ 6 Synchrophasors, in integer representation
➤ Integer representation for the frequency data
➤ 3 digital status bits, which require one status word
The message size is 18 + 6 • 4 + 2 • 2 + 1 • 2 = 48 bytes. Using Table H.12, the
engineer verifies that the port data rate of 9600 bps is adequate for the
message, at 10 messages per second.
The Protection SEL
OGIC Variables SV14, SV15, and SV16 are used to
transmit the breaker status, loss-of-potential alarm, and frequency
measurement status, respectively. Make the Global settings as shown in
Table H.13.
Table H.13 Example Synchrophasor Global Settings
Setting Description Value
FNOM Nominal System Frequency (50, 60 Hz) 60
EPMU Enable Synchronized Phasor Measurement (Y, N) Y
MRATE Messages per Second (1, 2, 4, 5, 10, 12, 15, 20, 30, 60) 10
PMAPP PMU Application (F := Fast Response, N := Narrow
Bandwidth)
FAST
PHCOMP Frequency-Based Phasor Compensation (Y, N) Y
PMSTN Station Name (16 characters) SAMPLE1
PMID PMU Hardware ID (1–65534) 14
PHDATAV Phasor Data Set, Voltages (V1, ALL, NA) V1
PHVOLT Voltage Source (VX, VY, Both) VX
VXCOMP Phase Voltage Angle Compensation Factor (–179.99 to 180
degrees)
4.20
PHDATAI Phasor Data Set, Currents (I1, ALL, NA) ALL
PHCURR Current Source (IX, IY, Both) IX
IXCOMP Phase Current Angle Compensation Factor (–179.99 to 180
degrees)
3.50
NUMDSW Number of 16-bit Digital Status Words (0 or 1) 1
Table H.14 Example Synchrophasor Logic Settings
Logic
Setting
Description Value
TREA1 Trigger Reason Bit 1 (SELOGIC Equation) NA
TREA2 Trigger Reason Bit 2 (SEL
OGIC Equation) NA
TREA3 Trigger Reason Bit 3 (SELOGIC Equation) NA
TREA4 Trigger Reason Bit 4 (SEL
OGIC Equation) NA
PMTRIG Trigger (SEL
OGIC Equation) NA
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