Schweitzer Engineering Laboratories SEL-700G1 - Figure 4.22 64 G Logic Diagram

4.45
Date Code 20170814 Instruction Manual SEL-700G Relay
Protection and Logic Functions
Group Settings (SET Command)
Figure 4.22 64G Logic Diagram
64G1TC
|VN1|
64G1P
|VPX3|
64RAT
|VN3|
64G2P
64RAT = 0.0
DELTAY_X = DELTA
64G2P
64G1TC
64G1
64G1T
T64G
N64G
64G2T
64G2
|VN3|
|V1X|
64G2D
0
64G1D
0
64G2TC
64G2TC
0.8 • VNOM_X • 1000
3 • PTRX
Relay
Word
Bits
SELOGIC
Setting
Settings/
Voltages
EXT3V0_X = NONE
SW1 in Position 1: If DELTAY_X := WYE
SW1 in Position 2: If DELTAY_X := DELTA and EXT3V0_X := VS
SW1 Open, i.e., neither in Position 1 nor Position 2: If DELTAY_X := DELTA and EXT3V0_X := NONE
Position 1: VP3X = VAX3 + VBX3 + VCX3 (Where VAX3, VBX3, and VCX3 are third-harmonic quantities
filtered out on corresponding phases)
Positio
n 2: VP3X = VS3 (Where VS3 is the third-harmonic component filtered out on VS channel)
a
b
Positive-
Sequence Voltage
Calculation
VN3
VPX3
b
V1X
|VN3|
|VPX3|
VN
PHROT
VAX
VBX
VCX
VABX
VBCX
VCAX
VN1
|VN1|
|V1X|
Fundamental
Frequency
Filter
Voltage
Magnitude
Calculation
SW1
a
1
2
Voltage Inputs
DELTAY_X := DELTA
EXT3V0_X := VS
Third-
Harmonic
Cosine Filter
VS
DELTAY_X := WYE