1\
System-off (down) in the
Normal system-off
Q3 state
1
The real-time timer is not A timer interrupt is issued
revised.
every 0.5 second to revise the
real-time timer.
2
FOUT is not issued.
FOUT is issuedevery 0.5
second.
3
The
svstern
can
be
turned
The
svstern
can be turned on
on by one of the following by one of the following
operations after clearing the operations.
weak battery condition.
CD
Depression of the
CD
Depression of the
SREAK/ON key
BREAK/ON key
®
Depression of the ALL
®
Depression of the ALL
RESET SWITCH located on
RESET switch located the back of the PC·1600
on the back of the
®
Depression of the RESET
PC·1600
switch located on the back
of the CE·1600P
G)
When the wake-up time
meets the real time as
programmed by the
WAKE$(O) statement
®
When the R5-232C Interface
CI input is set high by the
WAKE$(1) statement
The figure below shows the timings when the system turns
off.
VCC
VEE
..J
PRI:~ ~~~~--~-~~~~
~~~~~i~~~-_-_-_-_-_-_-~~~~~~~~~~~~~~~~~~~~~~~
P3
=
BFO
P2 =
SLcT
P1 •
SLcB
po-
ASTIN
Z15 -
zoo
A33 - A::20:...___
__l _
lIUU1nIUl _
Il_fl 00 _
cLK· 3.58MHz
CKO
=
217KHz
CD
When the subcontroller receives the system-off corn-
mand from the main CPU, it confirms that both
00 and KH are at a low level, Then, P2 and SLCT
are forced to low to disable the memory selection. If
KH is at high, the control proceeds to the system in
sequence.
® Then, P3 and BFO are set to high to turn off the
system power supptv, Wlth this, all
lnputs
and outputs
of the SC7852 and LH·5803 are turned to a low or
high impedance.
® The subcontroller goes into the standby mode, but
the real-timer issues a timer interrupt ever 0.5 second.
second.
(a) If the wake-up timer has been set, the time on
the real-timer is checked for whether it coincides
-11-
-
PC-1600
with the wakeup time. If it coincides, the system
is turned on.
(b) If the wake-up timer is set to turn on the system
with the RS-232C interface CI Input, the system
is turned on with the input of the CI signal as it
has been monitored.
If the weak battery signal Q3 goes high when the
system is off, the system down is established.
7-2. System-on operation
The figure below shows the timing sequence when the
system is turned on by the BREAK/ON key.
vcc
======;-_J
;-----------------------
B~(ON) ~
Z13
L__
KH ""' 30m2::==:j
PO=RSTIN ,
P3
=
BFO
P1
= SLCB
-1
P2=SLCT ~ ~~~
Z15"" ASTE ." Peripheral reset ~'l:-,-~:_1_m_' _
A
"
BREAK Key
!l:iID
entry
t
System-
Z-80
reset clear
on
Z12 ~ ~
A
Prohibit sending KCI
input
to
B5R
01
T8576F
PRIME
510 interface ,elected
-----------------
, "n"_
CLK
=
.:'~~8_":'I~~ :__
JU U:
MREQ :
-------------------:-------
,
,/1
: Z-80
starts
-
ELH
00 _
RSTO
CD
When the BREAK/ON key is pushed while the system
is off, the ON input of the LR38041 converts to low.
As Z13 is low, KH goes high.
® When KH goes high, the subcontroller starts to operate
assuming the start of the system. First, P3 is set low,
P2 low, Pl high, and PO low. Now, VCC is activated
because P3 and BFO are low, and the system reset
is applied with low PO and RSTIN states. The memory
and
1/0
selections are prohibited in low P2 and SLCT
states.
® Low PO and RSTIN states are issued for 30 milli-
seconds.
G) The Z15 peripheral reset output is issued for 1 mil-
lisecond to reset peripherals.
® First, P2 and SLCT are set to high to select memory
and
1/0,
then the system reset is cleared.
® In order to supply stable docking to the Z·80, it takes
about 0.3 millisecond before supplying the system
clock ,
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