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Sharp PC-1600

Sharp PC-1600
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-
PC-1600
Pin
Symbol ln/Out
Active
Function
No.
. level
91
LHMIO
Out
High
An interrupt is se nt to the SC7852. When there is an interrupt request to the LH·5803,
this signal goes high.
92
LHNMIO
ln/Out
High
(1 )
Goes high when the LH-5803 is 94**H and when PU
=
PV is high (CE-158 internal
ROM).
(2)
Becomes an input during reset. So, it must be pulled up or down with the external
resistor. With the PC-1600, it is pulled down.
93
LHOPFI
·In
High
Receives the OPF
outpur
of the LH-5803. Pulled down internally.
94
RSTO
Out
High
Reset outpur (high) to the LH-5803. When areset is issued to the Z-SO (RSTIN at lowl,
it makes RSTO high. The rest can only be cleared when the Z-80 first hands down the
control
to
the LH-5803. With this the LH-5803 starts
to
run.
t>:
Pulled up to VCC with the internal resistor, 200K ohms ~ 500K ohms .
; Internal resistance of 200K ohms - 500K ohms is active when the CPU is
on,
but no MOS resistance is met when the CPU is off.
9-2. Main CPU 1 (LH5803) pin description
Pin
No.
VCC
ln/Out
Active
level
FunctionSymbol
RESET
2
(NC)
In CPU reset input. A high on this line causes the reset. The contents of the address
FFFEH are transferred to the PH register and the contents of FFFFH to the PL
register. When the reset input changes from high to low, the program starts to execute
from the address set in the program cou nter.
3
BRQ
In
In
Bus request. Connected to ELH of the SC7852
output.
BF flip-flop
output
(BFO) and
input
(BFI).
The BF fiip-flop is reset by the OFF command of the CPU.
It can be reset when the BFI is set high.
The BFO is at a low level when the BF flip-flop is active and at a high level when not
active.
The contents of the BF flip-flop are protected as long as VGG is in supptv.
Because V GG is VCC in the PC-1600, this function is not used and VCC is used for
an input.
4
BFI
Power supply (system's VCC
input).
5
VGG
6
BFO
7
OPF
8
BAK
9
Out
Out
Out
See Pin No.4.
Op code fetch signal which appears when the CPU fetches the OP code.
OPF
is
the signal that is issued only when the operation code is fetched and
is
not there-
fore issued in fetehing the address data, immediate data, and the second
bvte
of a 2-step
command.
</>OS
I
,
,
,
l>C
,
AOO
:
-A015
,
,
,
,
'><=
------------------~,
~
,
,
'
MEO -,------- ---:
, r---~'------,
,
,
,
: Write Op code :
:--- cvcle fetch ~
OPF
Bus acknowledge signal.
When BRQ is set at a high level, the CPU issues a high BAK state in response to it.
When BAK is at a high level, the CPU sets the address bus (AOO - A015), data bus
(00-07), MEO, ME1, R/W, and 00 in high impedance.
Power supply (system's VCC Input].
-24-

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