-
PC-1600
Pin
Symbol ln/Out
Active
Function
No.
level
PB2: Cassette reproducing signal.
PC6':
Beep disable signal.
PCl':
Cassette recording signal (PC-1600).
SOO':
Cassette recording signal (PC·1500).
76
SOO Out
Cassette recording signal outpur.
SOO'
~SOO
PCl'
SDO' is the cassette recording output by the CE-150.
PCl' is the cassette recording output by the CE-1600P.
77
ELH Out
(1)
A low state of this signal indicates that the LH-5803 is in operation.
(2)
A high state of this signal indicates that the Z·80 is in operation.
78 PCSTB ln/Out
(1)
Goes into the input mode when reset. This current state is latched in
the PB3 flip-flop.
Therefore, either pulied down or up by an external resistor.
For the PC-1600, the machine version is represented by this signal.
PB3 = 0: Japan version
PB3 = 1: Export version
(2) Goesto the outpur line in the normal mode.
The signal goes high when the Z-80 writes 18H or
1/0
or the LH-5803 is FOO8H
of the M El. This signal is not used in the outout mode with the PC-1600.
,
79 RSTIN In Low
Areset input to the SC7852. This signal is forced low for 30 milliseconds by the sub
CPU when ACL or RESET is issued or at powsr-on.
80
IRQ
'" In
High An interrupt to the CPU (Z-80, LH-5803).
This line is input as an interrupt request from the PC-1500 peripheral.
81
INTO
In High
An interrupt to the CPU.
This line is input as an interrupt request from the T8576F.
82 INT1
'V
In
Low An interrupt to the CPU.
This line is input asan interrupt request from the PC-1600 peripheral.
Pulled up internally.
83 INT4 In
L
An interrupt to the CPU.
An interrupt is sent to the CPU at a high to low transition. This line is input at a
1/64 second pulse from the sub CPU. It is externally shorted with PB5.
But, the sub CPU output, which ls a PoChopen drain, is pulied down by the external
reslstor to assurea low output,
84 INT6
"'In
High An lnterruot to the CPU.
This line inputs the outout from the sub CPU.
85
PCTRL
Out Low
At the time the power-off command is sent to the sub CPU, the sub CPU turns the
power off (active low).
This signal goes low after the Z-80 completes the following:
(I)
11H written to
1/0
37H
( 11)
OUT (38H), A
(111)
HALT
86
CLK
Out
Z-80 clock outpur. 3.58MHz for the PC·1600.
87 T
"'In
(1)
It is in the normal mode when a low signal is received and the Z-80 is operating
normally. Pulied down internally.
(2)
It is in the simulation mode when a high signal is received. The Z-80 bus is in the
floating
srate,
and the Z"80 (or Z-80 ICE) can
oe cormecreo
ext.ernally.
88
XOUT
Out
The 3.58MHz Z·80 clock is supplied when the oscillator is attached acrossthese lines.
89
XIN
In
90
VOO
Power input to the high side (4-5.5V).
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