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SICK MITSUBISHI ELECTRIC MELSEC iQ-F Series - Page 145

SICK MITSUBISHI ELECTRIC MELSEC iQ-F Series
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APPX
Appendix 5 Buffer Memory
143
A
Output signal and internal error
Error information of the whole system is stored.
Buffer memory address
The buffer memory address of this area is as follows.
List of output signals and internal errors
System CRC
A CRC value for checking configuration and setting is stored.
Buffer memory address
The buffer memory address of this area is as follows.
List of system CRCs
Buffer memory name Address
1st Module Output signal and Internal error 102
Bit Output status or input error Operation
b0 Output signals Q2/3 0: No output
1: Output
b1 Output signals Q0/1
b2 Status change of a rotary switch 0: Not changed
1: Changed
b3 External device monitoring
connection open
0: Not detected
1: Detected
b4 Input concurrence error 0: Not detected
1: Detected
b5 Input process error 0: Not detected
1: Detected
b6 Input cross-circuit error 0: Not detected
1: Detected
b7 Internal error 0: Not detected
1: Detected
b8 to b15 Fixed to 0
Buffer memory name Address
1st Module System CRC 103
Buffer memory Name Description
b0 to 7 System CRC (lower) CRC_L for checking configuration and settings
b8 to b15 System CRC (upper) CRC_H for checking configuration and settings

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