2-18
Box PC 820 / PC FI45 V2, Manual
A5E00051531-03
2.8.11 LVDS Interface (Single Chip LVDS), X409
Pin no. Signal Description
1 VCC 3.3V / 5V voltage supply
2 VCC 3.3V / 5V voltage supply
3 GND GND
4 GND GND
5 RXIN0– LVDS input signal bit 0 (–)
6 RXIN0+ LVDS input signal bit 0 (+)
7 GND GND
8 RXIN1– LVDS input signal bit 1 (–)
9 RXIN1+ LVDS input signal bit 1 (+)
10 GND GND
11 RXIN2– LVDS input signal bit 2 (–)
12 RXIN2+ LVDS input signal bit 2 (+)
13 GND GND
14 RXCLKIN– LVDS clock signal (–)
15 RXCLKIN+ LVDS clock signal (+)
16 GND GND
17 Res. Not connected (reserved)
18 Res. Not connected (reserved)
19 GND GND
20 GND GND
2.8.12 Selection of Display Type / Polarity of Backlight-On Signal
(Switch S1)
S1-4 S1-3 S1-2 S1-1 Display type
on on on reserved
on on off 1280 x 1024, TFT
on off on reserved
on off off reserved
off on on 640 x 480, TFT (Sharp)
off on off 640 x 480, TFT (non Sharp)
off off on 1024 x 768, TFT (standard setting)
off off off 800 x 600, TFT
Motherboard