SN8P2501D
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 4 Version 1.5
3.9 EXTERNAL RESET CIRCUIT ....................................................................................................... 36
3.9.1 Simply RC Reset Circuit .......................................................................................................... 36
3.9.2 Diode & RC Reset Circuit ........................................................................................................ 37
3.9.3 Zener Diode Reset Circuit ........................................................................................................ 37
3.9.4 Voltage Bias Reset Circuit ....................................................................................................... 38
3.9.5 External Reset IC ...................................................................................................................... 38
SYSTEM CLOCK .................................................................................................................................. 39
4.1 OVERVIEW ..................................................................................................................................... 39
4.2 FCPU (INSTRUCTION CYCLE) ...................................................................................................... 39
4.3 NOISE FILTER ................................................................................................................................ 40
4.4 SYSTEM HIGH-SPEED CLOCK .................................................................................................... 40
4.4.1 HIGH_CLK CODE OPTION ................................................................................................... 40
4.4.2 INTERNAL HIGH-SPEED OSCILLATOR RC TYPE (IHRC) ............................................. 40
4.4.3 EXTERNAL HIGH-SPEED OSCILLATOR ........................................................................... 40
4.4.4 EXTERNAL OSCILLATOR APPLICATION CIRCUIT ....................................................... 41
4.5 SYSTEM LOW-SPEED CLOCK ..................................................................................................... 42
4.6 OSCM REGISTER ........................................................................................................................... 43
4.7 SYSTEM CLOCK MEASUREMENT ............................................................................................. 43
4.8 SYSTEM CLOCK TIMING ............................................................................................................. 44
SYSTEM OPERATION MODE ........................................................................................................... 47
5.1 OVERVIEW ..................................................................................................................................... 47
5.2 NORMAL MODE ............................................................................................................................ 48
5.3 SLOW MODE .................................................................................................................................. 48
5.4 POWER DOWN MODE .................................................................................................................. 48
5.5 GREEN MODE ................................................................................................................................ 49
5.6 OPERATING MODE CONTROL MACRO .................................................................................... 50
5.7 WAKEUP ......................................................................................................................................... 51
5.7.1 OVERVIEW ............................................................................................................................. 51
5.7.2 WAKEUP TIME ...................................................................................................................... 51
5.7.3 P1W WAKEUP CONTROL REGISTER ................................................................................ 52
INTERRUPT ........................................................................................................................................... 53
6.1 OVERVIEW ..................................................................................................................................... 53
6.2 INTEN INTERRUPT ENABLE REGISTER ................................................................................... 53
6.3 INTRQ INTERRUPT REQUEST REGISTER ................................................................................ 54
6.4 GIE GLOBAL INTERRUPT OPERATION .................................................................................... 54
6.5 PUSH, POP ROUTINE..................................................................................................................... 55
6.6 EXTERNAL INTERRUPT OPERATION (INT0) ........................................................................... 56
6.7 T0 INTERRUPT OPERATION........................................................................................................ 57
6.8 TC0 INTERRUPT OPERATION ..................................................................................................... 59
6.9 MULTI-INTERRUPT OPERATION ............................................................................................... 60
I/O PORT ................................................................................................................................................ 61
7.1 OVERVIEW ..................................................................................................................................... 61
7.2 I/O PORT MODE ............................................................................................................................. 62
7.3 I/O PULL UP REGISTER ................................................................................................................ 63
7.4 I/O OPEN-DRAIN REGISTER ........................................................................................................ 64
7.5 I/O PORT DATA REGISTER .......................................................................................................... 65
TIMERS .................................................................................................................................................. 66