SONIX SN8P2501D - 8 Timers; 8.1 Watchdog Timer

SN8P2501D
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 66 Version 1.5
8
8
8
TIMERS
8.1 WATCHDOG TIMER
The watchdog timer (WDT) is a binary up counter designed for monitoring program execution. If the program goes into
the unknown status by noise interference, WDT overflow signal raises and resets MCU. Watchdog clock controlled by
code option and the clock source is internal low-speed oscillator.
Watchdog overflow time = 8192 / Internal Low-Speed oscillator (sec).
VDD
Internal Low RC Freq.
Watchdog Overflow Time
3V
16KHz
512ms
5V
32KHz
256ms
The watchdog timer has three operating options controlled “WatchDog” code option.
 Disable: Disable watchdog timer function.
 Enable: Enable watchdog timer function. Watchdog timer actives in normal mode and slow mode. In power down
mode and green mode, the watchdog timer stops.
 Always_On: Enable watchdog timer function. The watchdog timer actives and not stop in power down mode and
green mode.
In high noisy environment, the “Always_On” option of watchdog operations is the strongly recommendation
to make the system reset under error situations and re-start again.
Watchdog clear is controlled by WDTR register. Moving 0x5A data into WDTR is to reset watchdog timer.
0CCH
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WDTR
WDTR7
WDTR6
WDTR5
WDTR4
WDTR3
WDTR2
WDTR1
WDTR0
Read/Write
W
W
W
W
W
W
W
W
After reset
0
0
0
0
0
0
0
0
 Example: An operation of watchdog timer is as following. To clear the watchdog timer counter in the top
of the main routine of the program.
Main:
MOV
A, #5AH
; Clear the watchdog timer.
B0MOV
WDTR, A
…
CALL
SUB1
CALL
SUB2
…
JMP
MAIN
 Example: Clear watchdog timer by “@RST_WDT” macro of Sonix IDE.
Main:
@RST_WDT
; Clear the watchdog timer.
…
CALL
SUB1
CALL
SUB2
…
JMP
MAIN