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SONIX SN8P2624 User Manual

SONIX SN8P2624
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SN8P2624
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 1 Version 0.3
SN8P2624
USER’S MANUAL
Preliminary Specification Version 0.3
SN8P2624
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SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.

Table of Contents

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SONIX SN8P2624 Specifications

General IconGeneral
BrandSONIX
ModelSN8P2624
CategoryMicrocontrollers
LanguageEnglish

Summary

1 Product Overview

1.1 Features

Key features of the SN8P2624 microcontroller, including memory, I/O, interrupts, instructions.

1.2 System Block Diagram

High-level block diagram illustrating the SN8P2624 microcontroller architecture.

1.3 Pin Assignment

Pin configuration for SN8P2624K, SN8P2624S, and SN8P2624X packages.

2 Central Processor Unit (CPU)

1.4 Pin Descriptions

Detailed description of each pin's function and type on the SN8P2624.

1.5 Pin Circuit Diagrams

Circuit diagrams illustrating the structure of different port types.

2.1 Memory Map

Overview of the program (ROM) and data (RAM) memory organization.

2.1.1 Program Memory (ROM)

Details of the ROM layout, including reset and interrupt vectors.

2.1.1.1 Reset Vector (0000H)

2.1.1.2 Interrupt Vector (0008H)

Explanation of the interrupt vector and how to define interrupt routines.

2.1.1.3 Look-up Table Description

How to use the ROM lookup function with Y and Z registers.

2.1.1.4 Jump Table Description

Description of jump table functionality for multi-address jumping.

2.1.1.5 Checksum Calculation

Method for calculating checksum for ROM code.

2.1.2 Code Option Table

2.1.3 Data Memory (RAM)

Structure and organization of the 64x8-bit RAM.

2.1.4 System Register

Table listing system registers and their bit definitions.

2.1.4.1 System Register Table

Table showing the layout and addresses of system registers.

2.1.4.2 System Register Description

Detailed description of each system register's function.

2.1.4.3 Bit Definition of System Register

2.1.4.4 Accumulator

Description of the ACC register and its use with PUSH/POP instructions.

2.1.4.5 Program Flag

Description of the PFLAG register, including ALU and reset status flags.

2.1.4.6 Program Counter

Explanation of the Program Counter (PC) and address skipping.

2.1.4.7 H, L Registers

Description of H and L registers for general use and RAM pointers.

2.1.4.8 Y, Z Registers

2.1.4.9 R Registers

Description of R register for working and storing ROM lookup table data.

2.2 Addressing Mode

Explanation of immediate, directly, and indirectly addressing modes.

2.3 Stack Operation

Overview of the 8-level stack buffer and STKP register.

2.3.2 Stack Registers

Details of STKP register and stack buffer (STKnH, STKnL) structure.

2.3.3 Stack Operation Example

3 RESET

Details on reset conditions, flags, and timing.

3.1 Overview

Summary of system reset conditions: power-on, watchdog, brown-out, external.

3.2 Power On Reset

Sequence and conditions for power-on reset.

3.3 Watchdog Reset

How the watchdog timer causes a system reset.

3.4 Brown Out Reset

3.4.2 The System Operating Voltage Description

Relationship between system voltage, rate, and reset levels.

3.4.3 Brown Out Reset Improvement

Methods to improve brown-out reset conditions.

3.5 External Reset

Functionality and sequence of external reset.

3.6 External Reset Circuit

Various external reset circuit implementations.

3.6.1 Simply RC Reset Circuit

3.6.2 Diode & RC Reset Circuit

Description and diagram of the Diode & RC reset circuit.

3.6.3 Zener Diode Reset Circuit

Description and diagram of the Zener Diode reset circuit.

3.6.4 Voltage Bias Reset Circuit

Description and diagram of the Voltage Bias reset circuit.

3.6.5 External Reset IC

Description of using an external reset IC for reset performance.

4 System Clock

4.1 Overview

Introduction to high-speed and low-speed clock sources.

4.2 Clock Block Diagram

Block diagram illustrating clock signal paths and modes.

4.3 Oscm Register

Control register for oscillator status and system modes.

4.4 System High Clock

Details on external high-speed clock sources (Crystal/Ceramic, RC).

4.4.1 External High Clock

4.4.1.1 Crystal/Ceramic

Connection and usage of Crystal/Ceramic oscillators.

4.4.1.2 RC

Connection and usage of RC oscillators.

4.4.1.3 External Clock Signal

Using external clock signals as the system clock.

4.5 System Low Clock

Details on the internal low-speed RC oscillator.

4.5.1 System Clock Measurement

5 System Operation Mode

Overview of the four operating modes: Normal, Slow, Green, Power-down.

5.1 Overview

Summary of the four low-power consumption modes.

5.2 System Mode Switching

Procedures for switching between operating modes.

5.3 Wakeup

How to wake the system from low-power modes.

5.3.1 Overview

5.3.2 Wakeup Time

Calculation of wakeup time from power-down mode.

5.3.3 P1W Wakeup Control Register

Control register for Port 1 wakeup function.

6 Interrupt

6.1 Overview

Summary of internal/external interrupts and GIE bit.

6.2 Inten Interrupt Enable Register

Register for enabling internal and external interrupt sources.

6.3 IntrQ Interrupt Request Register

Flag register indicating pending interrupt requests.

6.4 Gie Global Interrupt Operation

Controlling global interrupt enable/disable with GIE bit.

6.5 Push, Pop Routine

6.6 Into (P0.0) Interrupt Operation

Operation and setup for INTO (P0.0) interrupt.

6.7 Int1 (P0.1) Interrupt Operation

Operation and setup for INT1 (P0.1) interrupt.

6.8 T0 Interrupt Operation

Operation and setup for T0 timer interrupt.

6.9 TC1 Interrupt Operation

Operation and setup for TC1 timer interrupt.

6.10 Multi-Interrupt Operation

7 I/O Port

Overview of I/O port functionality and configuration.

7.1 I/O Port Mode

Configuring I/O ports for input or output mode.

7.2 I/O Pull Up Register

Register for enabling pull-up resistors on I/O ports.

7.3 I/O Open-Drain Register

Register for configuring open-drain output mode on ports.

7.4 I/O Port Data Register

8 Timers

Details on Watchdog Timer, Timer 0, and Timer 1.

8.1 Watchdog Timer

Functionality, overflow, and clearing of the watchdog timer.

8.2 Timer 0 (T0)

Overview and mode register for Timer 0.

8.2.1 Overview

Overview and mode register for Timer 0.

8.2.2 T0M Mode Register

8.2.3 TOC Counting Register

Register for controlling Timer 0 interval time.

8.2.4 T0 Timer Operation Sequence

Sequence for setting up Timer 0 operation.

8.3 Timer/Counter 0 (TC1)

Overview of TC1 timer functions: interrupts, events, buzzer, PWM.

8.3.1 Overview

Overview of TC1 timer functions: interrupts, events, buzzer, PWM.

8.3.2 TC1M Mode Register

8.3.3 TC1C Counting Register

Register for controlling TC1 interval time.

8.3.4 TC1R Auto-Load Register

Register for auto-loading TC1 counter values.

8.3.5 TC1 Clock Frequency Output (Buzzer)

Using TC1 for buzzer output and frequency control.

8.3.6 TC1 Timer Operation Sequence

Sequence for setting up TC1 timer operation for various modes.

8.4 PWM1 Mode

8.4.1 Overview

Overview of PWM generation using TC1.

8.4.2 TCxIRQ and PWM Duty

Relationship between TCxIRQ and PWM duty cycle.

8.4.3 PWM Duty with TCxR Changing

How changing TC1R affects PWM duty cycle.

8.4.4 PWM Program Example

Example code for setting up PWM1 output.

9 Instruction Table

10 Electrical Characteristic

10.1 Absolute Maximum Rating

Operating voltage, temperature, and other maximum limits.

10.2 Electrical Characteristic

Detailed electrical parameters like voltage, current, and timing.

10.3 Characteristic Graphs

Graphs illustrating voltage vs. frequency characteristics.

11 OTP Programming Pin

11.1.1 Easy Writer Transition Board Socket Pin Assignment

Pin assignments for Easy Writer transition boards.

11.1.2 Writer V2.5 and V3.0 Transition Board Socket Pin Assignment

Pin assignments for Writer V2.5/V3.0 transition boards.

11.1.3 Programming Pin Mapping

Mapping of pins for various programming connectors.

12 Package Information

12.1 SK-DIP 28 PIN

Mechanical dimensions for the SK-DIP 28-pin package.

12.2 SOP 28 PIN

Mechanical dimensions for the SOP 28-pin package.

12.3 SSOP 28 PIN

Mechanical dimensions for the SSOP 28-pin package.

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