SN8P2624
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 23 Version 0.3
2.1.4 SYSTEM REGISTER
2.1.4.1 SYSTEM REGISTER TABLE
0 1 2 3 4 5 6 7 8 9 A B C D E F
8
L H R Z Y - PFLAG - - - - - - - - -
9
- - - - - - - - - - - - - - - -
A
- - - - - - - - - - - - - - - -
B
- - - - - - - - P0M - - - - -
- PEDGE
C
P1W P1M P2M - - P5M - - INTRQ INTEN OSCM - WDTR - PCL PCH
D
P0 P1 P2 - - P5 - - T0M T0C - - TC1M TC1C TC1R STKP
E
P0UR P1UR P2UR - - P5UR @HL @YZ - P1OC - - - - - -
F
STK7L STK7H STK6L STK6H STK5L STK5H STK4L STK4H STK3L STK3H STK2L STK2H STK1L STK1H STK0L STK0H
2.1.4.2 SYSTEM REGISTER DESCRIPTION
PFLAG = ROM page and special flag register. R = Working register and ROM look-up data buffer.
H, L = Working, @HL and ROM addressing register. Y, Z = Working, @YZ and ROM addressing register.
P1W = Port 1 wakeup register. PEDGE = P0.0 edge direction register.
PnM = Port n input/output mode register. Pn = Port n data buffer.
P1OC = Port 1 open-drain control register. PnUR = Port n pull-up resister control register.
INTRQ = Interrupt request register. INTEN = Interrupt enable register.
OSCM = Oscillator mode register. PCH, PCL = Program counter.
T0M = T0 mode register. T0C = TC1 counting register.
TC1M = TC1 mode register. TC1C = TC1 counting register.
TC1R = TC1 auto-reload data buffer. WDTR = Watchdog timer clear register.
STKP = Stack pointer buffer. STK0~STK7 = Stack 0 ~ stack 7 buffer.
@YZ = RAM YZ indirect addressing index pointer. @HL = RAM HL indirect addressing index pointer.