SONIX SN8P2501D - Tc0 M Mode Register

SN8P2501D
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 74 Version 1.5
8.3.3 TC0M MODE REGISTER
TC0M is TC0 timer mode control register to configure TC0 operating mode including TC0 pre-scaler, clock source,
PWM function…These configurations must be setup completely before enabling TC0 timer.
0DAH
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TC0M
TC0ENB
TC0rate2
TC0rate1
TC0rate0
TC0CKS
ALOAD0
TC0OUT
PWM0OUT
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
After reset
0
0
0
0
0
0
0
0
Bit 0 PWM0OUT: PWM output control bit.
0 = Disable PWM output function, and P5.4 is GPIO mode.
1 = Enable PWM output function, and P5.4 outputs PWM signal. PWM duty controlled by TC0OUT,
ALOAD0 bits.
Bit 1 TC0OUT: TC0 time out toggle signal output control bit. Only valid when PWM0OUT = 0.
0 = Disable, P5.4 is I/O function.
1 = Enable, P5.4 is output TC0OUT signal.
Bit 2 ALOAD0: Auto-reload control bit. Only valid when PWM0OUT = 0.
0 = Disable TC0 auto-reload function.
1 = Enable TC0 auto-reload function.
Bit 3 TC0CKS: TC0 clock source select bit.
0 = Internal clock (Fcpu).
1 = External input pin (P0.0/INT0) and enable event counter function. TC0rate[2:0] bits are useless.
Bit [6:4] TC0RATE[2:0]: TC0 internal clock select bits.
000 = Fcpu/256, 001 = Fcpu/128, 010 = Fcpu/64, 011 = Fcpu/32, 100 = Fcpu/16, 101 = Fcpu/8, 110 =
Fcpu/4, 111 = Fcpu/2.
Bit 7 TC0ENB: TC0 counter control bit.
0 = Disable TC0 timer.
1 = Enable TC0 timer.
 Note: When TC0CKS=1, TC0 became an external event counter and TC0RATE is useless. No more P0.0
interrupt request will be raised. (P0.0IRQ will be always 0).