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SONIX SN8P2501D - 1 Product Overview; 1.1 Features

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SN8P2501D
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 6 Version 1.5
1
1
1
PRODUCT OVERVIEW
1.1 FEATURES
Features Selection Table
CHIP
ROM
RAM
Stack
I/O
IHRC
PWM
Buzzer
Wake-up
Pin No.
Package
T0
TC0
SN8P2501B
1K
48
4
V
V
12
V
1
1
5
DIP14/SOP14/SSOP16
SN8P2501D
1K
48
4
V
V
12
V
1
1
5
DIP14/SOP14/SSOP16
SN8P25011D
1K
48
4
V
V
6
V
1
1
5
DIP8/SOP8
Migration SN8P2501B to SN8P2501D/SN8P2511
Item
SN8P2501B
SN8P2501D/SN8P2511
T0 timer
In RTC mode, clear T0IRQ must be after
1/2 RTC clock source (32768Hz), or the
RTC interval time is error.
No limitation.
IHRC 16MHz
IHRC_16M and IHRC_RTC modes don't
support Fosc/1 and Fosc/2.
No limitation.
SN8P2501D is compatible to SN8P2501B/SN8P2511.
SN8P2501B/SN8P2511 code can transfer to SN8P2501D directly. Program the original SN8 of
SN8P2501B/SN8P2511 into SN8P2501D directly with writer selection SN8P2501D chip name to program and
doesnt need re-compile again in IDE.
Memory configuration
Fcpu (Instruction cycle)
ROM size: 1K * 16 bits.
Fcpu = Fosc/1, Fosc/2, Fosc/4, Fosc/8, Fosc/16.
RAM size: 48 * 8 bits.
One 8-bit basic timer with RTC (0.5Sec).
4 levels stack buffer.
One 8-bit timer with external event counter,
Buzzer and PWM. (TC0).
3 interrupt sources
2 internal interrupts: T0, TC0
On chip watchdog timer and clock source is
1 external interrupt: INT0
Internal low clock RC type (16KHz(3V), 32KHz(5V))
I/O pin configuration
Four system clocks
Bi-directional: P0, P1, P2, P5.
External high clock: RC type up to 10 MHz
Wakeup: P0, P1 level change.
External high clock: Crystal type up to 16 MHz
Pull-up resisters: P0, P1, P2, P5.
Internal high clock: 16MHz RC type
Input only: P1.1
Internal low clock: RC type 16KHz(3V), 32KHz(5V)
Programmable open-drain: P1.0
External interrupt: P0.0 (PEDGE edge trigger)
Four operating modes
Normal mode: Both high and low clock active
3-Level LVD.
Slow mode: Low clock only.
Reset system and power monitor.
Sleep mode: Both high and low clock stop
Green mode: Periodical wakeup by T0 timer
Powerful instructions
Instruction’s length is one word.
Package (Chip form support)
Most of instructions are one cycle only.
DIP 14 pin
All ROM area JMP/CALL instruction.
SOP 14 pin
All ROM area lookup table function (MOVC).
SSOP 16 pin
DIP 8 pin
SOP 8 pin

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