SONIX SN8P2501D - Tc0 C Counting Register

SN8P2501D
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 75 Version 1.5
8.3.4 TC0C COUNTING REGISTER
TC0C is TC0 8-bit counter. When TC0C overflow occurs, the TC0IRQ flag is set as “1” and cleared by program. The
TC0C decides TC0 interval time through below equation to calculate a correct value. It is necessary to write the correct
value to TC0C register and TC0R register first time, and then enable TC0 timer to make sure the fist cycle correct.
After one TC0 overflow occurs, the TC0C register is loaded a correct value from TC0R register automatically, not
program.
0DBH
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TC0C
TC0C7
TC0C6
TC0C5
TC0C4
TC0C3
TC0C2
TC0C1
TC0C0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
After reset
0
0
0
0
0
0
0
0
The equation of TC0C initial value is as following.
TC0C initial value = N - (TC0 interrupt interval time * TC0 clock rate)
N is TC0 overflow boundary number. TC0 timer overflow time has five types (TC0 timer, TC0 event counter, TC0 Fcpu
clock source, PWM mode and no PWM mode). These parameters decide TC0 overflow time and valid value as follow
table.
TC0CKS
PWM0
ALOAD0
TC0OUT
N
TC0C valid
value
TC0C value
binary type
Remark
0
0
x
x
256
0x00~0xFF
00000000b~11111111b
Overflow per 256 count
1
0
0
256
0x00~0xFF
00000000b~11111111b
Overflow per 256 count
1
0
1
64
0x00~0x3F
xx000000b~xx111111b
Overflow per 64 count
1
1
0
32
0x00~0x1F
xxx00000b~xxx11111b
Overflow per 32 count
1
1
1
16
0x00~0x0F
xxxx0000b~xxxx1111b
Overflow per 16 count
1
-
-
-
256
0x00~0xFF
00000000b~11111111b
Overflow per 256 count