SONIX SN8P2501D - Table of Contents

SN8P2501D
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 3 Version 1.5
Table of Content
AMENDENT HISTORY ................................................................................................................................ 2
1
1
1
PRODUCT OVERVIEW ......................................................................................................................... 6
1.1 FEATURES ........................................................................................................................................ 6
1.2 SYSTEM BLOCK DIAGRAM .......................................................................................................... 7
1.3 PIN ASSIGNMENT ........................................................................................................................... 7
1.4 PIN DESCRIPTIONS ......................................................................................................................... 9
1.5 PIN CIRCUIT DIAGRAMS ............................................................................................................. 10
2
2
2
CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 11
2.1 PROGRAM MEMORY (ROM) ....................................................................................................... 11
2.1.1 RESET VECTOR (0000H) ...................................................................................................... 12
2.1.2 INTERRUPT VECTOR (0008H) ............................................................................................. 13
2.1.3 LOOK-UP TABLE DESCRIPTION ........................................................................................ 15
2.1.4 JUMP TABLE DESCRIPTION ............................................................................................... 17
2.1.5 CHECKSUM CALCULATION............................................................................................... 19
2.2 DATA MEMORY (RAM) ................................................................................................................ 20
2.2.1 SYSTEM REGISTER .............................................................................................................. 20
2.2.1.1 SYSTEM REGISTER TABLE ............................................................................................ 20
2.2.1.2 SYSTEM REGISTER DESCRIPTION ............................................................................... 20
2.2.1.3 BIT DEFINITION of SYSTEM REGISTER ....................................................................... 21
2.2.2 ACCUMULATOR ................................................................................................................... 22
2.2.3 PROGRAM FLAG ................................................................................................................... 23
2.2.4 PROGRAM COUNTER........................................................................................................... 24
2.2.5 Y, Z REGISTERS..................................................................................................................... 26
2.2.6 R REGISTER ........................................................................................................................... 26
2.3 ADDRESSING MODE .................................................................................................................... 27
2.3.1 IMMEDIATE ADDRESSING MODE .................................................................................... 27
2.3.2 DIRECTLY ADDRESSING MODE ....................................................................................... 27
2.3.3 INDIRECTLY ADDRESSING MODE ................................................................................... 27
2.4 STACK OPERATION ...................................................................................................................... 28
2.4.1 OVERVIEW ............................................................................................................................. 28
2.4.2 STACK REGISTERS ............................................................................................................... 28
2.4.3 STACK OPERATION EXAMPLE.......................................................................................... 29
2.5 CODE OPTION TABLE .................................................................................................................. 30
2.5.1 Fcpu code option ...................................................................................................................... 30
2.5.2 Reset_Pin code option .............................................................................................................. 30
2.5.3 Security code option ................................................................................................................. 30
2.5.4 Noise Filter code option ........................................................................................................... 30
3
3
3
RESET ..................................................................................................................................................... 31
3.1 OVERVIEW ..................................................................................................................................... 31
3.2 POWER ON RESET ......................................................................................................................... 32
3.3 WATCHDOG RESET ...................................................................................................................... 32
3.4 BROWN OUT RESET ..................................................................................................................... 32
3.5 THE SYSTEM OPERATING VOLTAGE ....................................................................................... 33
3.6 LOW VOLTAGE DETECTOR (LVD) ............................................................................................ 33
3.7 BROWN OUT RESET IMPROVEMENT ....................................................................................... 35
3.8 EXTERNAL RESET ........................................................................................................................ 36