ST STEVAL-STWINBX1 - Figure 40. Core System Board Circuit Schematic (7 of 8)

Figure 40. Core system board circuit schematic (7 of 8)
Wi-Fi
Default OFF
BLE
Default ON
BLE current monitoring
For the Antenna Cut refers
to STEVAL-IBD008V1M
PG3
PH7
Wi-Fi current monitoring
PG4
PG2
PE12
PG15
PE7
PD9
PH9
PB6
PB9
PG2
PG3
PG4
PE1
PD5
PD6
PF6
PF7
PF14
PD13
PB6
PB9
PC13
PB5
PG9
PB4
DCDC_1 VDD_BLE
VDD_BLE
DCDC_2 VDD_WIFI
DCDC_2
DCDC_2
VDD_BLE
VDD_BLE
VDD_BLE
VDD_WIFI
VDD_WIFI VDD_WIFI
RTC_TAMP 1
S P I1_CLK
S P I1_MISO
S P I1_MOS I
BLE_RS T
I2C1_S CL
I2C1_S DA
S TS AFE _RES ET
I2C1_S CL
I2C1_S DA
BLE_TES T8
BLE_TES T9
BLE_INT
BLE_INT
BLE_S P I_CS
USART2_TX
USART2_RX
WIFI_EN
S P I1_MISO
WIFI_CS
S P I1_MOS I
S P I1_CLK
WIFI_FLOW
WIFI_NOTIFY
WIFI_BOOT
BLE_RS T
S P I3_CLK
S P I3_MOS I
S P I3_MISO
C45
100nF
J 8
NU
1
2
3
4
5
C72
100nF
R27
4.7k
R49 0R
S B9 NU
C27
100nFR26
4.7k
S B3
NU
U5 BLUENRG-M2S A
6
5
VBLUE
4
DIO5/I2C_S DA
3
DIO4/I2C_CLK
2
ADC IN1
1
ADC IN2
9 7
10 11 12 13 14
15
DIO0/S P I_CLK
16
DIO2/S P I_MISO
18
DIO1/S P I_CS
19
BT_RES ET
20
DIOA12
17
8
DIO3/S P I_MOS I
DIO14/ANATES T0 DIO7/BOOT/UART_CTS GND DIO6/UART_RTS DIO8/UART_TXD DIO11/UART_RXD DIO9/TCK/S WTCK DIO10/TMS/S WTDI ANATEST1
21
GND_RF
22
NC# 2 2 NC# 2 3
23
S B8 0R
S B2 NU
S B43 NU
S B6 0R
R23
47k
C73
2.2uF
TP S
TAMP E R1
S B1
NU
NUS B44
J 11
NU
1
2
3
4
5
S B5 0R
R48 0R
C74
100nF
TP 11
U23
3
EMW3080(BP )
SWCLK
4
SWDIO
5
NC#1
6
NC#2
7
SP I_MIS O
8
SP I_CS /CTS
9
MOS I/TXD
10
CLK/RXD
11
CHIP_EN
12
GPIO_ 1 2
13
GPIO_ 1 3
14
GPIO_ 1 4 NC# 3
15
VDD
16
GND
17
NC#4
18
BOOT
19
NC#5
20
NC#6
21
22
GP IO_22
23
EASYLINK
R22
4.7k
S B4 0R
S B7 NU
C71
2.2uF
TP 10
U7
S TS AFE -A110
8
NC#3
SCL
7
6
NC#2
3
NC#1
GND
4
1
RES ET
2
VCC
SDA
5
BLE_S P I_S CK
BLE_S P I_MIS O
BLE_S P I_MOS I
BLE_S WDCLK
BLE_S WDIO
BLE_RS T
BLE_CS
BLE_S P I_MOS I
BLE_S P I_MIS O
BLE_S P I_S CK
BLE_S WDIO
BLE_S WDCLK
BLE_CS
WIFI_S WDCLK
WIFI_S WDIO
WIFI_S WDIO
WIFI_S WDCLK
STSAFE-A110
UM2965 - Rev 1
page 41/58
UM2965
Schematic diagrams