097-10603-01 Rev. A – November 2004 X72 Desiger’s Reference and User’s Guide 87
X72 1PPS Algorithm Theory of Operation
X72 1PPS Algorithm Theory of Operation
X72 qualifies 1 pulse per second inputs by analyzing the time difference between
the X72’s 1PPS output and the external 1PPS input. This is referred to as the
HoldOver state. The X72 determines whether the 1PPS input is useable by
calculating the rate of change in timing measurements that are taken once per
second.
Once a 1PPS input is qualified, the X72 1PPS algorithm determines if it is
necessary to adjust the counter that produces the 1PPS output (JamSynch state).
The algorithm then begins to adjust the output frequency of the X72 to keep the
1PPS output aligned with the 1PPs input. This is the disciplining state and the
control method is a Proportional Integral Derivatives (PID) scheme.
The amount of frequency change and the length of time required to reach 1PPS
accuracy can be adjusted by setting y1 (damping factor) and y2 (time constant)
parameters. During this disciplining state, the timing of each 1PPS input is
compared to the expected value. If the offset exceeds 333 nanoseconds, the
algorithm changes to the HoldOver state and the process begins again. Refer to the
following figures for additional details.
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