Tandy 1000 Technical Reference Manual

Tandy 1000
inter
825318253·5
Technical Reference Manual
MODE 2: Rate aenellltor. Divide by N counter. The out·
put will be low for one period of the Input clock. The
period from one output pulse to the next equals the
number of input counts in the count register. If the
count register is reloaded between output pulses the
present period will not be affected, but the subsequent
period will reflect the new value.
The
gate input, when low, will force the output high.
When the
gate Input goes high, the counter will start
from the initial count. Thus, the gate input can be used
to synchronize the counter.
When this mode is set, the output will remain high until
after the count register is loaded. The output then can
also be synchronized by software.
output will go low for one input clock period, then will
go high again.
If the count register is reloaded during counting, the new
count will be loaded on the next eLK pulse. The count will
be
inhibited while the GATE input is low.
MODE
5: Hardwere Triggered Strobe. The counter will
start counting after the rising edge of the trigger Input
and will go low for one clock period when the terminal
count is reached. The counter is retriggerable. The out·
put will not go low until the full count after the rising
edge of any trigger.
MODE 3: Square Wave Rate Generator.Similar to MODE
2
except that the output will remain high until one half
the count has been completed (for even numbers) and
go low for the other half of the count. This is accom·
plished by decrementing the counter by two on the fall·
ing edge
of each clock pulse. When the counter reaches
terminal count, the state of the output is changed and
the
counter is reloaded with the full count and the whale
process is repeated.
If the count is odd and the output is high, the first clock
pulse (after the count is loaded) decrements the count
by 1. Subsequent clock pulses decrement the clock by
2. After timeout, the output goes low and the full count
is reloaded. The first clock pulse (following the reload)
decrements the counter by 3. Subsequent clock pulses
decrement the count by 2 until timeout. Then the whole
process is repeated. In this way, if the count is odd, the
output will be high for (N + 1)/2 counts and low for
(N - 1)/2 counts.
~
ign.,
Status
Modes
low
Or Going
low
Disables
counting
I) Disables
counting
2) Sels OulPU1
Immedlalely
high
1) Disables
counting
2) Sets output
Immediately
'rllgh
Disables
counting
Rising
1) Initiates
counting
2) Resets OUlpU!
alfer next clocl(
1) Reloads
counter
2) Inltlales
counting
High
Enables
countmg
Enables
counting
Enables
counting
Enables
counting
MODE 4: Software Triggered Strobe. After the mode is
set,
the output will be high. When the count is loaded,
the counter will begin counting. On terminal count, the
6-143
InItiates
counting
Figure 6. Gate Pin Operation. Summery
AFN.()()745C

Tandy 1000 Specifications

General

Processor	Intel 8088
Processor Speed	4.77 MHz
RAM	128 KB (expandable to 640 KB)
Operating System	MS-DOS 2.11
Manufacturer	Tandy Corporation
Release Year	1984
Storage	Single or double 5.25" floppy disk drive (360 KB), optional hard drive
Sound	Tandy 3-voice sound
Ports	Parallel, Serial
Graphics	CGA (Color Graphics Adapter)
Graphics Modes	320x200, 640x200