Tandy 1000
Technical Reference Manual
8237A/8237A-4/8237A-5
HIGH
PERFORMANCE
PROGRAMMABLE
DMA
CONTROLLER
• Enable/Disable Control of Individual
DMA Requests
• Four Independent DMA Channels
• Independent Autoinitialization of all
Channels
• Memory·to·Memory Transfers
• Memory Block Initialization
• Address Increment or Decrement
• High performance: Transfers up to 1.6M
Bytes/Second with 5 MHz 8237A·5
• Directly Expandable to any Number of
Channels
•
End
of Process Input for Terminating
Transfers
• Software DMA Requests
• Independent Polarity Control for DREQ
and DACK Signals
• Available
in
EXPRESS
- Standard Temperature Range
The 8237A
Multimode
Direct Memory Access (DMA)
Controller
is
a peripheral
interface
circuit
for microprocessor sys-
tems.
It is
designed
to
improve
system
performance by
allowing
external devices
to
directly
transfer
information
from
the system memory. Memory-to-memory transfer
capability
is also provided. The 8237A
offers
a wide variety
of
pro-
grammable
control
features
to
enhance data
throughput
and system
optimization
and
to
allow dynamic reconfigura-
tion under program control.
The 8237A is designed
to
be used in
conjunction
with
an external 8-bit address
register
such as the 8282.
It
contains
four independent channels and may be expanded
to
any number
of
channels by cascading additional
controller
chips.
The three basic transfer modes
allow
programmability
of
the types
of
DMA service
.by
the
user. Each channel can be
individually programmed
to
Autoinitialize
to
its original
condition
following an End of Process
(EOP).
Each channel has a full 64K address and word
count
capability.
The
8237A-4 and 8237A-5 are 4 MHz and 5 MHz selected versions of the standard 3 MHz 8237A respectively.
Figure
1.
Block Diagram
2-88
Figure
2.
Pin
Configuration
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