DQS[x]+
DQS[x]-
Routed Differentially
DQS[x]
DQ[x]
AM335x
DQ[x]
IO Buffer
DDR3
DQ[x]
IO Buffer
AM335x
DQS[x]
IO Buffer
DDR3
DQS[x]
IO Buffer
Routed Differentially
DQS[x]-
DQS[x]+
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
www.ti.com
SPRS717H –OCTOBER 2011–REVISED MAY 2015
x = 0, 1
Figure 7-62. DQS[x] Topology
x = 0, 1
Figure 7-63. DQ[x] Topology
7.7.2.3.5.2 DQS[x] and DQ[x] Routing, Any Number of Allowed DDR3 Devices
Figure 7-64 and Figure 7-65 show the DQS[x] and DQ[x] routing.
x = 0, 1
Figure 7-64. DQS[x] Routing With Any Number of Allowed DDR3 Devices
x = 0, 1
Figure 7-65. DQ[x] Routing With Any Number of Allowed DDR3 Devices
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