MDIO_CLK (Output)
1
2
MDIO_DATA (Input)
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
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SPRS717H –OCTOBER 2011–REVISED MAY 2015
Table 7-102. PRU-ICSS ECAT Switching Requirements - Digital IOs
NO. PARAMETER MIN MAX UNIT
1 t
w(EDIO_OUTVALID)
Pulse duration, EDIO_OUTVALID 14 × P
(1)
32 × P
(1)
ns
2 t
r(EDIO_OUTVALID)
Rising time, EDIO_OUTVALID 1.00 3.00 ns
3 t
f(EDIO_OUTVALID)
Falling time, EDIO_OUTVALID 1.00 3.00 ns
4 t
d(EDIO_OUTVALID-
Delay time, EDIO_OUTVALID to EDIO_DATA_OUT 0.00 18 × P
(1)
ns
EDIO_DATA_OUT)
5 t
r(EDIO_DATA_OUT)
Rising time, EDIO_DATA_OUT 1.00 3.00 ns
6 t
f(EDIO_DATA_OUT)
Falling time, EDIO_DATA_OUT 1.00 3.00 ns
7 t
sk(EDIO_DATA_OUT)
EDIO_DATA_OUT skew 8.00 ns
(1) P = PRU-ICSS IEP clock source period.
7.14.3 PRU-ICSS MII_RT and Switch
Table 7-103. PRU-ICSS MII_RT Switch Timing Conditions
PARAMETER MIN TYP MAX UNIT
Input Conditions
t
R
Input signal rise time 1
(1)
3
(1)
ns
t
F
Input signal fall time 1
(1)
3
(1)
ns
Output Condition
C
LOAD
Output load capacitance 3 20 pF
(1) Except when specified otherwise.
7.14.3.1 PRU-ICSS MDIO Electrical Data and Timing
Table 7-104. PRU-ICSS MDIO Timing Requirements – MDIO_DATA
(see Figure 7-106)
NO. MIN TYP MAX UNIT
1 t
su(MDIO-MDC)
Setup time, MDIO valid before MDC high 90 ns
2 t
h(MDIO-MDC)
Hold time, MDIO valid from MDC high 0 ns
Figure 7-106. PRU-ICSS MDIO_DATA Timing - Input Mode
Table 7-105. PRU-ICSS MDIO Switching Characteristics - MDIO_CLK
(see Figure 7-107)
NO. PARAMETER MIN TYP MAX UNIT
1 t
c(MDC)
Cycle time, MDC 400 ns
2 t
w(MDCH)
Pulse duration, MDC high 160 ns
3 t
w(MDCL)
Pulse duration, MDC low 160 ns
4 t
t(MDC)
Transition time, MDC 5 ns
Copyright © 2011–2015, Texas Instruments Incorporated Peripheral Information and Timings 229
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