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SPRUI97D–May 2017–Revised September 2019
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Copyright © 2017–2019, Texas Instruments Incorporated
Contents
11.1 Tri-color LEDs........................................................................................................... 21
11.2 Industrial Inputs ......................................................................................................... 21
11.3 Industrial Outputs / LEDs .............................................................................................. 21
12 Pin Use Description............................................................................................................ 22
12.1 Functional Interface Mapping ......................................................................................... 22
12.2 GPIO Pin Mapping...................................................................................................... 22
13 Board Connectors .............................................................................................................. 24
14 EVM Important Notice ......................................................................................................... 37
Appendix A Known Deficiencies in AM571x IDK EVM ..................................................................... 38
A.1 Power solution not sufficient for full PCIe plug-in card compliance............................................. 38
A.2 Early versions of the AM571x IDK EVM not installed with SOC devices rated for the full industrial
temperature range...................................................................................................... 38
A.3 AM571x IDK EVM does not support eMMC HS200 mode....................................................... 38
A.4 PCIe PERSTn line not in proper state at start-up................................................................. 38
A.5 EDIO connectors J4 and J7 should support real-time debugging for both PRU1 and PRU2 ............... 38
A.6 HDQ implementation not correct .................................................................................... 38
A.7 Removing the power plug and inserting it again while the power supply is energized may cause
damage .................................................................................................................. 38
A.8 Software shutdown of PMIC not operational ...................................................................... 39
A.9 CCS System Reset fails ............................................................................................. 39
A.10 AM571x IDK EVM design contains 2 clamp circuits that may not be necessary ............................. 39
A.11 Crystal connected to osc0 needs to have 50ppm or better long term accuracy .............................. 39
A.12 Software must program the CDCE913 for 0pf load capacitance................................................ 39
A.13 Protection diode D2 should be rated for 5V ....................................................................... 39
A.14 PHY address LSB for U9 and U15 can be latched incorrectly .................................................. 40
A.15 3.3-V clamp circuit needs more margin ............................................................................ 40
A.16 Current PMIC does not provide the mandated power down sequence ........................................ 40
A.17 Power supply droop may cause board reset ...................................................................... 40
A.18 AM5718 pin N21 must be connected to 1.8 V, as it is VDDS18V_DDR1 and not N/C ...................... 40
A.19 VOUT1 is used at 3.3 V, which violates erratum i920............................................................ 40
A.20 PMIC OSC16MCAP pin mistakenly grounded .................................................................... 40
Revision History.......................................................................................................................... 41
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