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Serial Peripheral Interface (SPI)

The SPI module is a synchronous serial I/O port that shifts a serial bit stream of variable length

and data rate between the C28x and other peripheral devices. During data transfers, one SPI

device must be configured as the transfer MASTER, and all other devices configured as

SLAVES. The master drives the transfer clock signal for all SLAVES on the bus. SPI

communications can be implemented in any of three different modes:

• MASTER sends data, SLAVES send dummy data

• MASTER sends data, one SLAVE sends data

• MASTER sends dummy data, one SLAVE sends data

In its simplest form, the SPI can be thought of as a programmable shift register. Data is shifted in

and out of the SPI through the SPIDAT register. Data to be transmitted is written directly to the

SPIDAT register, and received data is latched into the SPIBUF register for reading by the CPU.

This allows for double-buffered receive operation, in that the CPU need not read the current

received data from SPIBUF before a new receive operation can be started. However, the CPU

must read SPIBUF before the new operation is complete of a receiver overrun error will occur. In

addition, double-buffered transmit is not supported: the current transmission must be complete

before the next data character is written to SPIDAT or the current transmission will be corrupted.

The Master can initiate a data transfer at any time because it controls the SPICLK signal. The

software, however, determines how the Master detects when the Slave is ready to broadcast.

SPI Data Flow

SPI Shift Register

SPI Device #1 - Master SPI Device #2 - Slave

 Simultaneous transmits and receive

 SPI Master provides the clock signal

shift

clock

11 - 4 C28x - Communications

Texas Instruments C28 Series Student Guide

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