Serial Peripheral Interface (SPI)
Since data is shifted out of the SPIDAT register MSB first, transmission characters of less than 16
bits must be left-justified by the CPU software prior to be written to SPIDAT.
Received data is shifted into SPIDAT from the left, MSB first. However, the entire sixteen bits
of SPIDAT is copied into SPIBUF after the character transmission is complete such that received
characters of less than 16 bits will be right-justified in SPIBUF. The non-utilized higher
significance bits must be masked-off by the CPU software when it interprets the character. For
example, a 9 bit character transmission would require masking-off the 7 MSB’s.
SPI Data Character Justification
Programmable data
length of 1 to 16 bits
Transmitted data of less
than 16 bits must be left
justified
MSB transmitted first
Received data of less
than 16 bits are right
justified
User software must
mask-off unused MSB’s
11001001XXXXXXXX
11001001XXXXXXXX
XXXXXXXX11001001
XXXXXXXX11001001
SPIDAT - Processor #1
SPIDAT - Processor #2
11 - 6 C28x - Communications
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