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PRODUCTPREVIEW

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128-bitcomparator

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UNLOCK

FlashModuleOutput

OTP Contents

UnlockByScan

InternalTie-Offs

(exampleonly)

(example)

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InternalTie-Offs

(exampleonly)

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RM46L852

www.ti.com

SPNS185 –SEPTEMBER 2012

4.21.6 Advanced JTAG Security Module

This device includes a an Advanced JTAG Security Module (AJSM). which provides maximum security to

the device’s memory content by allowing users to secure the device after programming.

Figure 4-22. AJSM Unlock

The device is unsecure by default by virtue of a 128-bit visible unlock code programmed in the OTP

address 0xF0000000.The OTP contents are XOR-ed with the "Unlock By Scan" register contents. The

outputs of these XOR gates are again combined with a set of secret internal tie-offs. The output of this

combinational logic is compared against a secret hard-wired 128-bit value. A match results in the

UNLOCK signal being asserted, so that the device is now unsecure.

A user can secure the device by changing at least one bit in the visible unlock code from 1 to 0. Changing

a 0 to 1 is not possible since the visible unlock code is stored in the One Time Programmable (OTP) flash

region. Also, changing all the 128 bits to zeros is not a valid condition and will permanently secure the

device.

Once secured, a user can unsecure the device by scanning an appropriate value into the "Unlock By

Scan" register of the AJSM module. This register is accessible by configuring an IR value of 0b1011 on

the AJSM TAP. The value to be scanned is such that the XOR of the OTP contents and the Unlock-By-

Scan register contents results in the original visible unlock code.

The Unlock-By-Scan register is reset only upon asserting power-on reset (nPORRST).

A secure device only permits JTAG accesses to the AJSM scan chain via the Secondary Tap # 2 of the

ICEPick module. All other secondary taps, test taps and the boundary scan interface are not accessible in

this state.

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Texas Instruments RM46L852 User Manual

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