RM46L852
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SPNS185 –SEPTEMBER 2012
Table 5-7. eCAPx Clock Enable Control
ePWM Module Instance Control Register to Enable Clock Default Value
eCAP1 PINMMR39[0] 1
eCAP2 PINMMR39[8] 1
eCAP3 PINMMR39[16] 1
eCAP4 PINMMR39[24] 1
eCAP5 PINMMR40[0] 1
eCAP6 PINMMR40[8] 1
The default value of the control registers to enable the clocks to the eCAPx modules is 1. This means that
the VCLK4 clock connections to the eCAPx modules are enabled by default. The application can choose
to gate off the VCLK4 clock to any eCAPx module individually by clearing the respective control register
bit.
5.2.2 PWM Output Capability of eCAPx
When not used in capture mode, each of the eCAPx modules can be used as a single-channel PWM
output. This is called the auxiliary PWM (APWM) mode of operation of the eCAP modules. Refer to the
eCAP chapter of the device Technical Reference Manual for more information.
5.2.3 Input Connection to eCAPx Modules
The input connection to each of the eCAP modules can be selected between a double-VCLK4-
synchronized input or a double-VCLK4-synchronized and filtered input, as shown in Table 5-8.
Table 5-8. Device-Level Input Connection to eCAPx Modules
Input Signal Control for Double-Synchronized Connection to Control for Double-Synchronized and Filtered
eCAPx Connection to eCAPx
eCAP1 PINMMR43[0] = 1 PINMMR43[0] = 0 AND PINMMR43[1] = 1
eCAP2 PINMMR43[8] = 1 PINMMR43[8] = 0 AND PINMMR43[9] = 1
eCAP3 PINMMR43[16] = 1 PINMMR43[16] = 0 AND PINMMR43[17] = 1
eCAP4 PINMMR43[24] = 1 PINMMR43[24] = 0 AND PINMMR43[25] = 1
eCAP5 PINMMR44[0] = 1 PINMMR44[0] = 0 AND PINMMR44[1] = 1
eCAP6 PINMMR44[8] = 1 PINMMR44[8] = 0 AND PINMMR44[9] = 1
5.2.4 Enhanced Capture Module (eCAP) Timings
Table 5-9. eCAPx Timing Requirements
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
w(CAP)
Capture input pulse width Synchronous 2 t
c(VCLK4)
cycles
Synchronous, with input 2 t
c(VCLK4)
+ filter width cycles
filter
Table 5-10. eCAPx Switching Characteristics
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
w(APWM)
Pulse duration, APWMx output high or low 20 ns
Copyright © 2012, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 123
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