Texas Instruments TMS320C6748 User Manual

112
TMS320C6748
SPRS590G –JUNE 2009–REVISED JANUARY 2017 www.ti.com
Submit Documentation Feedback
Product Folder Links: TMS320C6748
Peripheral Information and Electrical Specifications Copyright © 2009–2017, Texas Instruments Incorporated
6.10.6 EMIFA Electrical Data/Timing
Table 6-19 through Table 6-22 assume testing over recommended operating conditions.
Table 6-19. Timing Requirements for EMIFA SDRAM Interface
NO.
1.3V, 1.2V 1.1V 1.0V
UNIT
MIN MAX MIN MAX MIN MAX
19 t
su(EMA_DV-EM_CLKH)
Input setup time, read data valid on EMA_D[15:0] before
EMA_CLK rising
2 3 3 ns
20 t
h(CLKH-DIV)
Input hold time, read data valid on EMA_D[15:0] after
EMA_CLK rising
1.6 1.6 1.6 ns
Table 6-20. Switching Characteristics for EMIFA SDRAM Interface
NO. PARAMETER
1.3V, 1.2V 1.1V 1.0V
UNIT
MIN MAX MIN MAX MIN MAX
1 t
c(CLK)
Cycle time, EMIF clock EMA_CLK 10 15 20 ns
2 t
w(CLK)
Pulse width, EMIF clock EMA_CLK high or low 3 5 8 ns
3 t
d(CLKH-CSV)
Delay time, EMA_CLK rising to EMA_CS[0] valid 7 9.5 13 ns
4 t
oh(CLKH-CSIV)
Output hold time, EMA_CLK rising to EMA_CS[0] invalid 1 1 1 ns
5 t
d(CLKH-DQMV)
Delay time, EMA_CLK rising to EMA_WE_DQM[1:0] valid 7 9.5 13 ns
6 t
oh(CLKH-DQMIV)
Output hold time, EMA_CLK rising to EMA_WE_DQM[1:0]
invalid
1 1 1 ns
7 t
d(CLKH-AV)
Delay time, EMA_CLK rising to EMA_A[12:0] and
EMA_BA[1:0] valid
7 9.5 13 ns
8 t
oh(CLKH-AIV)
Output hold time, EMA_CLK rising to EMA_A[12:0] and
EMA_BA[1:0] invalid
1 1 1 ns
9 t
d(CLKH-DV)
Delay time, EMA_CLK rising to EMA_D[15:0] valid 7 9.5 13 ns
10 t
oh(CLKH-DIV)
Output hold time, EMA_CLK rising to EMA_D[15:0] invalid 1 1 1 ns
11 t
d(CLKH-RASV)
Delay time, EMA_CLK rising to EMA_RAS valid 7 9.5 13 ns
12 t
oh(CLKH-RASIV)
Output hold time, EMA_CLK rising to EMA_RAS invalid 1 1 1 ns
13 t
d(CLKH-CASV)
Delay time, EMA_CLK rising to EMA_CAS valid 7 9.5 13 ns
14 t
oh(CLKH-CASIV)
Output hold time, EMA_CLK rising to EMA_CAS invalid 1 1 1 ns
15 t
d(CLKH-WEV)
Delay time, EMA_CLK rising to EMA_WE valid 7 9.5 13 ns
16 t
oh(CLKH-WEIV)
Output hold time, EMA_CLK rising to EMA_WE invalid 1 1 1 ns
17 t
dis(CLKH-DHZ)
Delay time, EMA_CLK rising to EMA_D[15:0] tri-stated 7 9.5 13 ns
18 t
ena(CLKH-DLZ)
Output hold time, EMA_CLK rising to EMA_D[15:0] driving 1 1 1 ns

Texas Instruments TMS320C6748 Specifications

General

Brand	Texas Instruments
Model	TMS320C6748
Category	Control Unit
Language	English