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Table 5-3. BUCK NVM Settings (continued)

TPS65941120-Q1 TPS65941421-Q1 LP876411B5-Q1

Value Description Value Description Value Description

BUCK3_VOUT_2 BUCK3_VSET2 0xfd 3.30 V 0xb2 1.80 V 0x0 0.3 V

BUCK4_VOUT_1 BUCK4_VSET1 0x0 0.3 V 0x73 1.10 V 0x0 0.3 V

BUCK4_VOUT_2 BUCK4_VSET2 0x0 0.3 V 0x73 1.10 V 0x0 0.3 V

BUCK5_VOUT_1 BUCK5_VSET1 0x41 0.850 V 0x41 0.850 V

BUCK5_VOUT_2 BUCK5_VSET2 0x41 0.850 V 0x41 0.850 V

BUCK1_PG_WIN

DOW

BUCK1_OV_THR 0x3 +5% / +50 mV 0x3 +5% / +50 mV 0x3 +5% / +50 mV

BUCK1_UV_THR 0x3 -5% / -50 mV 0x3 -5% / -50 mV 0x3 -5% / -50 mV

BUCK2_PG_WIN

DOW

BUCK2_OV_THR 0x3 +5% / +50 mV 0x7 +10% / +100mV 0x3 +5% / +50 mV

BUCK2_UV_THR 0x3 -5% / -50 mV 0x7 -10% / -100mV 0x3 -5% / -50 mV

BUCK3_PG_WIN

DOW

BUCK3_OV_THR 0x7 +10% / +100mV 0x3 +5% / +50 mV 0x0 +3% / +30mV

BUCK3_UV_THR 0x7 -10% / -100mV 0x3 -5% / -50 mV 0x0 -3% / -30mV

BUCK4_PG_WIN

DOW

BUCK4_OV_THR 0x0 +3% / +30mV 0x3 +5% / +50 mV 0x0 +3% / +30mV

BUCK4_UV_THR 0x0 -3% / -30mV 0x3 -5% / -50 mV 0x0 -3% / -30mV

BUCK5_PG_WIN

DOW

BUCK5_OV_THR 0x3 +5% / +50 mV 0x3 +5% / +50 mV

BUCK5_UV_THR 0x3 -5% / -50 mV 0x3 -5% / -50 mV

Static NVM Settings www.ti.com

18 TPS65941120-Q1, TPS65941421-Q1 and LP876411B5-Q1 PMIC User Guide

for J721S2, PDN-0A

SLVUCJ9 – FEBRUARY 2023

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Texas Instruments TPS65941120-Q1 User Manual

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